The 9DBV0631 is a member of IDT's 1.8V Very-Low-Power (VLP) PCIe family. The device has 6 output enables for clock management and 3 selectable SMBus addresses. Recommended Application 1.8V PCIe Gen1-2-3 Zero Delay/Fanout Buffer (ZDB/FOB) Output Features • 6 - 1-200 MHz Low-Power (LP) HCSL DIF pairs Key Specifications • DIF additive cycle-to-cycle jitter <5ps.
• 6 - 1-200 MHz Low-Power (LP) HCSL DIF pairs
Key Specifications
• DIF additive cycle-to-cycle jitter <5ps
• DIF output-to-output skew <60ps
• DIF additive phase jitter is <100fs rms for PCIe Gen3
• DIF additive phase jitter <300fs rms for SGMII
Block Diagram
Features/Benefits
• LP-HCSL outputs; save 12 resistors compared to standard
PCIe devices
• 55mW typical power consumption in PLL mode; minimal
power consumption
• Outputs can optionally be supplied from any voltage
between 1.05 and 1.8V; maximum power savings
• OE# pins; support DIF power management
• HCSL-compatible differential input; .
The 9DBV0631 is a member of Renesas’ 1.8V Very-Low-Power (VLP) PCIe family. The device has 6 output enables for clock ma.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | 9DBV0641 |
IDT |
Clock Buffer | |
2 | 9DBV0641 |
Renesas |
6-Output 1.8V PCIe Zero-Delay/Fanout Clock Buffer | |
3 | 9DBV0231 |
IDT |
2-output 1.8V PCIe Gen1/2/3 Zero Delay / Fanout Buffer | |
4 | 9DBV0231 |
Renesas |
2-Output 1.8V PCIe Zero-Delay/Fanout Clock Buffer | |
5 | 9DBV0241 |
IDT |
2-Output 1.8V PCIe Gen1-2-3 Zero Delay / Fanout Buffer | |
6 | 9DBV0431 |
IDT |
4-output 1.8V PCIe Gen1-2-3 Zero-delay/Fanout Buffer | |
7 | 9DBV0431 |
Renesas |
Zero-delay/Fanout Buffer | |
8 | 9DBV0441 |
IDT |
4 O/P 1.8V PCIe Gen1-2-3 ZDB/FOB | |
9 | 9DBV0441 |
Renesas |
1.8V PCIe Gen1-4 ZDB/FOB | |
10 | 9DBV0531 |
IDT |
5-output 1.8V HCSL Fanout Buffer | |
11 | 9DBV0531 |
Renesas |
5 to 9-Output 1.8V Low-Power Buffers | |
12 | 9DBV0541 |
IDT |
5 Output 1.8V HCSL Fanout Buffer |