. . 6 2. Specifications . . . . . . . . 9 2.1 Absolute Maximum Ratings .
▪ 2 to 8 Low-Power HCSL (LP-HCSL) outputs eliminate 4 resistors per output pair
▪ 9DBL0x4x devices provide integrated 100Ω terminations
▪ 9DBL0x5x devices provide integrated 85Ω terminations
▪ See AN-891 for easy coupling to other logic families
▪ Spread-spectrum compatible ▪ Dedicated OE# pin for each output ▪ 1MHz to 200MHz operation in fan-out mode ▪ 3 selectable SMBus addresses ▪ Extensive SMBus-selectable features allow
optimization to customer requirements ▪ SMBus interface not required for device operation ▪ -40°C to +85°C operating temperature range ▪ Space-saving packages:
• 4 × 4 mm .
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | 9DBL0651 |
Renesas |
Zero-Delay/Fanout Buffer | |
2 | 9DBL0651 |
IDT |
6-output 3.3V PCIe Zero-Delay Buffer | |
3 | 9DBL0653 |
IDT |
6-output 3.3V LP-HCSL Zero-Delay Buffer | |
4 | 9DBL06 |
IDT |
6-output 3.3V PCIe Zero-Delay Buffer | |
5 | 9DBL0641 |
Renesas |
Zero-Delay/Fanout Buffer | |
6 | 9DBL0641 |
IDT |
6-output 3.3V PCIe Zero-Delay Buffer | |
7 | 9DBL0641C |
Renesas |
2 to 8-Output 3.3V PCIe Zero-Delay/Fanout Buffers | |
8 | 9DBL0643 |
IDT |
6-output 3.3V LP-HCSL Zero-Delay Buffer | |
9 | 9DBL02 |
IDT |
2-output 3.3V PCIe Zero-Delay Buffer | |
10 | 9DBL0242 |
Renesas |
Zero-Delay/Fanout Buffer | |
11 | 9DBL0242 |
IDT |
2-output 3.3V PCIe Zero-Delay Buffer | |
12 | 9DBL0242C |
Renesas |
2 to 8-Output 3.3V PCIe Zero-Delay/Fanout Buffers |