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The 9DBL0242 / 9DBL0252 devices are 3.3V members of IDT's Full-Featured PCIe family. The devices support PCIe Gen1-4 Common Clocked (CC) and PCIe Gen2 Separate Reference Independent Spread (SRIS) systems. It offers a choice of integrated output terminations providing direct connection to 85 or 100 transmission lines. The 9DBL02P2 can be factory programmed .
• 2
– 1-200 MHz Low-Power (LP) HCSL DIF pairs
• 9DBL0242 default ZOUT = 100
• 9DBL0252 default ZOUT = 85
• 9DBL02P2 factory programmable defaults
• Easy AC-coupling to other logic families, see IDT
application note AN-891
Key Specifications
• PCIe Gen1-2-3-4 CC compliant in ZDB mode
• PCIe Gen2 SRIS compliant in ZDB mode
• Su.
9DBL0252 - Renesas
The 9DBL02x2/9DBL04x2/ 9DBL06x1/9DBL08x1 buffers are low-power, high-performance members of Renesas' full featured PCIe .
| No. | Partie # | Fabricant | Description | Fiche Technique |
|---|---|---|---|---|
| 1 | 9DBL0252C |
Renesas |
2 to 8-Output 3.3V PCIe Zero-Delay/Fanout Buffers |
|
| 2 | 9DBL0253 |
IDT |
2-Output 3.3V LP-HCSL Zero-Delay Buffer |
|
| 3 | 9DBL0255 |
Renesas |
2 and 4-Output 3.3V PCIe Gen1-5 Clock Fanout Buffers |
|
| 4 | 9DBL0255 |
IDT |
PCIe Gen1-5 Clock Fanout Buffers |
|
| 5 | 9DBL02 |
IDT |
2-output 3.3V PCIe Zero-Delay Buffer |
|
| 6 | 9DBL0242 |
Renesas |
Zero-Delay/Fanout Buffer |
|
| 7 | 9DBL0242 |
IDT |
2-output 3.3V PCIe Zero-Delay Buffer |
|
| 8 | 9DBL0242C |
Renesas |
2 to 8-Output 3.3V PCIe Zero-Delay/Fanout Buffers |
|
| 9 | 9DBL0243 |
IDT |
2-Output 3.3V LP-HCSL Zero-Delay Buffer |
|
| 10 | 9DBL04 |
IDT |
4-output 3.3V PCIe Zero-delay Buffer |
|
| 11 | 9DBL0442 |
Renesas |
3.3V PCIe Zero Delay Buffer |
|
| 12 | 9DBL0442 |
Renesas |
Zero-Delay/Fanout Buffer |
|