8S89833 - Renesas

8S89833 1-To-4 Differential-To-LVDS Fanout Buffer w/Internal Termination

The 8S89833 is a high speed 1-to-4 Differential-to-LVDS Fanout Buffer with Internal Termination. The 8S89833 is optimized for high speed and very low output skew, making it suitable for use in demanding applications such as SONET, 1 Gigabit and 10 Gigabit Ethernet, and Fibre Channel. The internally terminated differential input and VREF_AC pin allow other di.

Features

• Four differential LVDS outputs
• IN, nIN input pair can accept the following differential input levels: LVPECL, LVDS, CML
• Output frequency: 2GHz
• Cycle-to-cycle jitter, RMS: 3.5ps (maximum)
• Additive phase jitter, RMS: 0.03ps (typical)
• Output skew: 30ps (maximum)
• Part-to-part skew: 200ps (maximum)
• Propagation Delay: 600ps (maximum)
• Full 3.3V supply mode
• -40°C to 85°C ambient operating temperature
• Available in lead-free (RoHS 6) package Block Diagram Q0 nQ0 IN 50Ω VT 50Ω nIN VREF_AC EN Pullup DQ Q1 nQ1 Q2 nQ2 Q3 nQ3 Pin Assignment nQ3 Q3 VDD GND 16 15 14 13 Q0 1 12 I.