74VHCT126A - STMicroelectronics

74VHCT126A QUAD BUS BUFFERS

The 74VHCT126A is an advanced high-speed CMOS QUAD BUS BUFFERS fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. This device requires the 3-STATE control input G to be set low to place the output into the high impedance state. Power down protection is provided on all inputs and outputs and 0 to 7V can be accepted on inp.

Features

n inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS March 2000 1/8 74VHCT126A INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1, 4, 10, 13 2, 5, 9, 12 3, 6, 8, 11 7 14 SYMBOL 1G to 4G 1A to 4A 1Y to 4Y GND VCC NAME AND FUNCT ION Output Enable Inputs Data Inputs Data Outputs Ground (0V) Positive Supply Voltage TRUTH TABLE A X L H X:”H” or ”L” Z: High Impedance G L H H.