The 74VHC126; 74VHCT126 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7-A. The 74VHC126; 74VHCT126 provide four non-inverting buffer/line drivers with 3-state outputs. The 3-state outputs (nY) are controlled by the output enable input (nOE). A LOW-level .
I Balanced propagation delays I All inputs have Schmitt-trigger action I Inputs accept voltages higher than VCC I Input levels: N The 74VHC126 operates with CMOS input level N The 74VHCT126 operates with TTL input level I ESD protection: N HBM JESD22-A114E exceeds 2000 V N MM JESD22-A115-A exceeds 200 V N CDM JESD22-C101C exceeds 1000 V I Multiple package options I Specified from −40 °C to +85 °C and from −40 °C to +125 °C NXP Semiconductors 74VHC126; 74VHCT126 Quad buffer/line driver; 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name.
The 74VHC126; 74VHCT126 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). .
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | 74VHCT125 |
NXP |
Quad buffer/line driver | |
2 | 74VHCT125 |
nexperia |
Quad buffer/line driver | |
3 | 74VHCT125A |
STMicroelectronics |
QUAD BUS BUFFERS | |
4 | 74VHCT126-Q100 |
nexperia |
Quad buffer/line driver | |
5 | 74VHCT126A |
STMicroelectronics |
QUAD BUS BUFFERS | |
6 | 74VHCT132A |
STMicroelectronics |
QUAD 2-INPUT SCHMITT NAND GATE | |
7 | 74VHCT138A |
STMicroelectronics |
3 TO 8 LINE DECODER INVERTING | |
8 | 74VHCT138A |
Fairchild Semiconductor |
3-to-8 Decoder/Demultiplexer | |
9 | 74VHCT139A |
STMicroelectronics |
DUAL 2 TO 4 DECODER/DEMULTIPLEXER | |
10 | 74VHCT14 |
nexperia |
Hex inverting Schmitt trigger | |
11 | 74VHCT14A |
STMicroelectronics |
HEX SCHMITT INVERTER | |
12 | 74VHCT14A |
Fairchild Semiconductor |
Hex Schmitt Inverter |