These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times. In high-performance memory systems these decoders can be used to minimize the effects of system decoding. When used with high-speed memories, the delay times of these decoders are usually less.
s Designed specifically for high speed: Memory decoders Data transmission systems s DM74S138 3-to-8-line decoders incorporates 3 enable inputs to simplify cascading and/or data reception s DM74S139 contains two fully independent 2-to-4-line decoders/demultiplexers s Schottky clamped for high performance s Typical propagation delay time (3 levels of logic) DM74S138 8 ns DM74S139 7.5 ns s Typical power dissipation DM74S138 245 mW DM74S139 300 mW Ordering Code: Order Number DM74S138N DM74S139N Package Number N16E N16E Package Description 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001,.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | 74S133 |
SYC |
13-Input NAND Gate | |
2 | 74S134 |
Fairchild |
12-INPUT POSITIVE-NAND GATES | |
3 | 74S134 |
Signetics |
12-INPUT POSITIVE-NAND GATES | |
4 | 74S135 |
Fairchild |
Quad Exclusive OR/NOR Gate | |
5 | 74S135 |
Signetics |
Quad Exclusive OR/NOR Gate | |
6 | 74S138 |
Fairchild Semiconductor |
Decoder/Demultiplexer | |
7 | 74S10 |
TW |
STTL type three 3-input NAND gate | |
8 | 74S112 |
Fairchild Semiconductor |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop | |
9 | 74S140 |
Fairchild Semiconductor |
Dual 4-Input NSND Line Driver | |
10 | 74S140 |
National Semiconductor |
Dual 4-Input NSND Line Driver | |
11 | 74S15 |
TW |
STTL type three 3-input AND gate | |
12 | 74S153 |
Fairchild Semiconductor |
Dual 1-of-4 Line Data Selector/Multiplexer |