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74HC74 - nexperia

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74HC74 Dual D-type flip-flop

The 74HC74 and 74HCT74 are dual positive edge triggered D-type flip-flop. They have individual data (nD), clock (nCP), set (nSD) and reset (nRD) inputs, and complementary nQ and nQ outputs. Data at the nD-input, that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition, is stored in the flip-flop and appears at the nQ output. Schmi.

Features


• Wide supply voltage range from 2.0 to 6.0 V
• CMOS low power dissipation
• High noise immunity
• Input levels:
• For 74HC74: CMOS level
• For 74HCT74: TTL level
• Symmetrical output impedance
• High noise immunity
• Balanced propagation delays
• Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
• Complies with JEDEC standards:
• JESD8C (2.7 V to 3.6 V)
• JESD7A (2.0 V to 6.0 V)
• ESD protection:
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V
• Multiple package options
• Specified from -40 °C to +85 °C and from -40 °C to +125 °C 3. Ordering information Tab.

The same part from a different manufacturer

Datasheet 74HC74 - ON Semiconductor 74HC74

www.DataSheet4U.com 74HC74 Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS The 74HC74 is identic.

Datasheet 74HC74 - Texas Instruments 74HC74

The SNx4HC74 devices contain two independent D-type positive-edge-triggered flip-flops with asynchronous preset and cle.

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