The 74HC73 is a dual negative edge triggered JK flip-flop with individual J, K, clock (nCP) and reset (nR) inputs and complementary nQ and nQ outputs. The J and K inputs must be stable one set-up time prior to the HIGH-to-LOW clock transition for predictable operation. (nR) is asynchronous, when LOW it overrides the clock and data inputs, forcing the nQ outp.
• CMOS low-power dissipation
• Wide supply voltage range from 2.0 to 6.0 V
• High noise immunity
• Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
• Complies with JEDEC standards
• JESD8C (2.7 V to 3.6 V)
• JESD7A (2.0 V to 6.0 V)
• ESD protection:
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V
• Specified from -40 °C to +80 °C and from -40 °C to +125 °C
3. Ordering information
Table 1. Ordering information Type number Package
Temperature range
74HC73D
-40 °C to +125 °C
74HC73PW -40 °C to +125 °C
Name SO14
TSSOP14
Description
plastic small outline p.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | 74HC73 |
nexperia |
Dual JK flip-flop | |
2 | 74HC73 |
NXP |
Dual JK flip-flop | |
3 | 74HC7014 |
Philips |
Hex non-inverting precision Schmitt-trigger | |
4 | 74HC7014 |
nexperia |
Hex non-inverting precision Schmitt-trigger | |
5 | 74HC7014-Q100 |
nexperia |
Hex non-inverting precision Schmitt-trigger | |
6 | 74HC7014D |
nexperia |
Hex non-inverting precision Schmitt-trigger | |
7 | 74HC7030 |
Philips |
9-bit x 64-word FIFO register | |
8 | 74HC7046A |
Philips |
Phase-locked-loop | |
9 | 74HC7080 |
Philips |
16-bit even/odd parity generator/checker | |
10 | 74HC7240 |
STMicroelectronics |
OCTAL BUS BUFFER | |
11 | 74HC7245 |
Philips |
Octal bus Schmitt-trigger transceiver | |
12 | 74HC7266 |
Philips |
Quad 2-input EXCLUSIVE-NOR gate |