74HC4040 12-stage binary ripple counter Datasheet

74HC4040 12-stage binary ripple counter

The 74HC4040; 74HCT4040 is a 12-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and twelve parallel outputs (Q0 to Q11). The counter advances on the HIGH-to-LOW transition of CP. A HIGH on MR clears all counter stages and forces all outputs LOW, independent of the state of CP. Each counter stage is a st.

Features

 Complies with JEDEC standard no. 7A
 Input levels:  For 74HC4040: CMOS level  For 74HCT4040: TTL level
 ESD protection:  HBM JESD22-A114F exceeds 2000 V  MM JESD22-A115-A exceeds 200 V
 Multiple package options
 Specified from 40 C to +85 C and from 40 C to +125 C 3. Applications
 Frequency dividing circuits
 Time delay circuits
 Control counters 4. Ordering information Table 1. Ordering information Type number Package Temperature range 74HC4040D 40 C to +125 C 74HCT4040D 74HC4040DB 40 C to +125 C 74HCT4040DB Name SO16 SSOP16 Description plastic small outline pack.

The same part from a different manufacturer

74HC4040 - nexperia

The 74HC4040; 74HCT4040 is a 12-stage binary ripple counter with a clock input (CP), an overriding asynchronous master r.

74HC4040 - Texas Instruments

The ’HC4040 devices are 12-stage asynchronous binary counters, with the outputs of all stages available externally. A h.

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74HC4040 - NXP