74HC174 - nexperia

74HC174 Hex D-type flip-flop

The 74HC174; 74HCT174 are hex positive edge-triggered D-type flip-flops with individual data inputs (Dn) and outputs (Qn). The common clock (CP) and master reset (MR) inputs load and reset all flip-flops simultaneously. The D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition is stored in the flip-flop and appears at t.

Features

• Wide supply voltage range from 2.0 to 6.0 V
• CMOS low power dissipation
• High noise immunity
• Input levels:
• For 74HC174: CMOS level
• For 74HCT174: TTL level
• Six edge-triggered D-type flip-flops
• Asynchronous master reset
• Complies with JEDEC standards
• JESD8C (2.7 V to 3.6 V)
• JESD7A (2.0 V to 6.0 V)
• Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
• ESD protection:
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V.
• Multiple package options
• Specified from -40 °C to +85 °C and -40 °C to +125 °C. 3. Ordering information Table 1. Ordering inf.