The 74ALVCH16543 is a dual octal registered transceiver. Each section contains two sets of D-type latches for temporary storage of the data flow in either direction. Separate latch enable (nLEAB, nLEBA) and output enable (nOEAB, nOEBA) inputs are provided for each register to permit independent control in either direction of the data flow. The 74ALVCH16543 c.
• CMOS low power consumption
• Direct interface with TTL levels
• MULTIBYTE flow-through standard pin-out architecture
• Back-to-back registers for storage
• Output drive capability 50 Ω transmission lines at 85 °C
• All data inputs have bushold
• Low inductance multiple VCC and GND pins for minimize noise and ground bounce
• Current drive ±24 mA at VCC = 3.0 V.
• 3-state non-inverting outputs for bus oriented applications
• Complies with JEDEC standards:
– JESD8-5 (2.3 V to 2.7 V)
– JESD8B/JESD36 (2.7 V to 3.6 V)
• ESD protection:
– HBM ANSI/ESDA/JEDEC JS-001 exceeds 2000 V
– CDM JESD22-C101E.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | 74ALVCH16543 |
NXP |
16-bit D-type registered transceiver | |
2 | 74ALVCH16543 |
nexperia |
16-bit D-type registered transceiver | |
3 | 74ALVCH16540 |
NXP |
2.5V/3.3V 16-bit buffer/line driver | |
4 | 74ALVCH16500 |
NXP |
18-bit universal bus transceiver | |
5 | 74ALVCH16500 |
nexperia |
18-bit universal bus transceiver | |
6 | 74ALVCH16500DGG |
nexperia |
18-bit universal bus transceiver | |
7 | 74ALVCH16501 |
NXP |
18-bit universal bus transceiver | |
8 | 74ALVCH16501 |
nexperia |
18-bit universal bus transceiver | |
9 | 74ALVCH162240 |
Fairchild Semiconductor |
Low Voltage 16-Bit Inverting Buffer/Line Driver | |
10 | 74ALVCH162244 |
NXP |
16-bit buffer/line driver | |
11 | 74ALVCH162244 |
Fairchild Semiconductor |
Low Voltage 16-Bit Buffer/Line Driver | |
12 | 74ALVCH162244 |
Renesas |
3.3V CMOS 16-BIT BUFFER/DRIVER |