The 74ALVCH16501 is an 18-bit universal transceiver with bus hold inputs and 3-state outputs. Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock (CPAB and CPBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is HIGH. When LEAB is LOW, the A data is latched i.
• Wide supply voltage range from 1.2 V to 3.6 V
• CMOS low power dissipation
• Direct interface with TTL levels
• Current drive ±24 mA at VCC = 3.0 V
• Universal bus transceiver with D-type latches and D-type flip-flops capable of operating in
transparent, latched or clocked mode
• Bus hold on all data inputs
• Output drive capability 50 Ω transmission lines at 85 °C
• 3-state non-inverting outputs for bus-oriented applications
• Latch-up performance exceeds 100 mA per JESD78 Class II Level B
• Complies with JEDEC standards:
• JESD8-7 (1.65 V to 1.95 V)
• JESD8-5 (2.3 V to 2.7 V)
• JESD8C (2.7.
The 74ALVCH16501 is an 18-bit universal transceiver featuring non-inverting 3-State bus compatible outputs in both send .
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | 74ALVCH16500 |
NXP |
18-bit universal bus transceiver | |
2 | 74ALVCH16500 |
nexperia |
18-bit universal bus transceiver | |
3 | 74ALVCH16500DGG |
nexperia |
18-bit universal bus transceiver | |
4 | 74ALVCH16540 |
NXP |
2.5V/3.3V 16-bit buffer/line driver | |
5 | 74ALVCH16543 |
NXP |
16-bit D-type registered transceiver | |
6 | 74ALVCH16543 |
nexperia |
16-bit D-type registered transceiver | |
7 | 74ALVCH16543DGG |
nexperia |
16-bit D-type registered transceiver | |
8 | 74ALVCH162240 |
Fairchild Semiconductor |
Low Voltage 16-Bit Inverting Buffer/Line Driver | |
9 | 74ALVCH162244 |
NXP |
16-bit buffer/line driver | |
10 | 74ALVCH162244 |
Fairchild Semiconductor |
Low Voltage 16-Bit Buffer/Line Driver | |
11 | 74ALVCH162244 |
Renesas |
3.3V CMOS 16-BIT BUFFER/DRIVER | |
12 | 74ALVCH162244 |
nexperia |
16-bit buffer/line driver |