These buffers line drivers are designed to improve both the performance and PC board density of TRI-STATE buffers drivers employed as memory-address drivers clock drivers and bus-oriented transmitters receivers Featuring 400 mV of hysteresis at each low current PNP data line input they provide improved noise rejection and high fanout outputs and can be used .
Y TRI-STATE outputs drive bus lines directly Y PNP inputs reduce DC loading on bus lines Y Hysteresis at data inputs improves noise margins
Y Typical IOL (sink current) 54LS 12 mA
74LS 24 mA
Y Typical IOH (source current) 54LS b12 mA
74LS b15 mA
Y Typical propagation delay times
Inverting
10 5 ns
Noninverting 12 ns
Y Typical enable disable time 18 ns
Y Typical power dissipation (enabled)
Inverting
130 mW
Noninverting 135 mW
Connection Diagram
Dual-In-Line Package
TL F 8442
– 1
Order Number 54LS244DMQB 54LS244FMQB 54LS244LMQB DM74LS244WM or DM74LS244N
See NS Package Number E20A .
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | 54LS240 |
BDTIC |
LSTTL eight-Buffer / Bus Driver | |
2 | 54LS240 |
National Semiconductor |
Octal TRI-STATE Buffer / Line Drivers / Line Receivers | |
3 | 54LS241 |
Signetics |
(54LS240) Octal Buffer | |
4 | 54LS245 |
Texas Instruments |
Octal Bus Transceivers | |
5 | 54LS245D2 |
SGS-Thomson |
Octal Bus Transceiver | |
6 | 54LS20 |
National Semiconductor |
Dual 4-Input NAND Gates | |
7 | 54LS21 |
National Semiconductor |
Dual 4-Input AND Gates | |
8 | 54LS21 |
Motorola |
DUAL 4-INPUT AND GATE | |
9 | 54LS22 |
National Semiconductor |
Dual 4-Input NAND Gates | |
10 | 54LS22 |
Motorola |
DUAL 4-INPUT NAND GATE | |
11 | 54LS256 |
National Semiconductor |
Dual 4-Bit Addressable Latch | |
12 | 54LS256 |
Motorola |
DUAL 4-BIT ADDRESSABLE LATCH |