4953 - CXW

4953 Dual P-Channel MOSFET

Dual P - Channel Enhancement Mode Field Effect Transistor 4953 4953 DATASHEET P R ODUC T S UMMAR Y VDS S -30V ID -5.3A R DS (ON) ( m Ω ) Typ 50 @ VG S = -10V 70 @ VG S = -4.5V F E AT UR E S S uper high dense cell design for low R DS(ON). R ugged and reliable. S urface Mount P ackage. D1 D2 4953 SIYWW G1 G2 S1 S2 SOP-8 top view Marking and pin assig.

Features

C unless otherwise noted) P a ra meter S ymbol C ondition Min Typ C Max Unit OFF CHARACTERISTICS Drain-S ource Breakdown Voltage BVDSS VGS =0V, ID =-250uA -30 Zero Gate Voltage Drain Current IDSS VDS =-24V, VGS =0V Gate-Body Leakage ON CHARACTERISTICS b IGSS VGS = 20V, VDS= 0V V -1 uA 100 nA Gate Threshold Voltage V G S (th) Drain-S ource On-S tate R esistance R DS(ON) On-S tate Drain Current Forward Transconductance DYNAMIC CHARACTERISTICS c ID(ON) gFS Input Capacitance C IS S Output Capacitance COSS R everse Transfer Capacitance CRSS SWITCHING CHARACTERISTICS c Turn-O.