46V32M16 - Micron Technology

46V32M16 MT46V32M16

The 512Mb DDR SDRAM is a high-speed CMOS, dynamic random-access memory containing 536,870,912 bits. It is internally configured as a quadbank DRAM. The 512Mb DDR SDRAM uses a double data rate architecture to achieve high-speed operation. The double data rate architecture is essentially a 2 n prefetch architecture with an interface designed to transfer two da.

Features

• VDD = +2.5V ±0.2V, VDDQ = +2.5V ±0.2V
• Bidirectional data strobe (DQS) transmitted/ received with data, i.e., source-synchronous data www.DataSheet4U.com capture (x16 has two
  – one per byte)
• Internal, pipelined double-data-rate (DDR) architecture; two data accesses per clock cycle
• Differential clock inputs (CK and CK#)
• Commands entered on each positive CK edge
• DQS edge-aligned with data for READs; centeraligned with data for WRITEs
• DLL to align DQ and DQS transitions with CK
• Four internal banks for concurrent operation
• Data mask (DM) for masking write data (x16 has two
  – one p.