PSD813F1 |
Part Number | PSD813F1 |
Manufacturer | STMicroelectronics (https://www.st.com/) |
Description | ..... . . . . . . . . . . 6 In-System Programming (ISP) via JTAG. . . . . . . . . . .... |
Features |
SUMMARY
s DUAL BANK FLASH MEMORIES
– 1 Mbit of Primary Flash Memory (8 Uniform Sectors) – 256 Kbit Secondary EEPROM (4 Uniform Sectors) – Concurrent operation: read from one memory while erasing and writing the other s 16 Kbit SRAM (BATTERY-BACKED) s PLD WITH MACROCELLS – Over 3,000 Gates Of PLD: DPLD and CPLD – DPLD - User-defined Internal chip-select decoding – CPLD with 16 Output Macrocells (OMCs) and 24 Input Macrocells (IMCs) s 27 RECONFIGURABLE I/Os – 27 individually configurable I/O port pins that can be used for the following functions: MCU I/Os; PLD I/Os; Latched MCU address output; a... |
Document |
PSD813F1 Data Sheet
PDF 638.67KB |
Distributor | Stock | Price | Buy |
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No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | PSD813F1-A |
STMicroelectronics |
Flash In-System Programmable (ISP) Peripherals | |
2 | PSD813F1A |
STMicroelectronics |
Flash in-system programmable (ISP) peripherals | |
3 | PSD813F1V |
STMicroelectronics |
Flash in-system programmable peripherals | |
4 | PSD813F2 |
STMicroelectronics |
Flash in-system programmable (ISP) peripherals for 8-bit MCUs | |
5 | PSD813F2V |
STMicroelectronics |
Flash in-system programmable (ISP) peripherals |