PSD813F1-A - STMicroelectronics

PSD813F1-A Flash In-System Programmable (ISP) Peripherals

.......10 8.0 PSD813F1 Register Description and Address Offset ..............14 9.0 PSD813F1 Functional Blocks .........

Features

SUMMARY s Single Supply Voltage:
  – 5 V±10% for PSD813F1-A
  – 3.3 V±10% for PSD813F1-AV s Up to 1Mbit of Primary Flash Memory (8 uniform sectors) s 256Kbit Secondary EEPROM (4 uniform sectors) s Up to 16Kbit SRAM s Over 3,000 Gates of PLD: DPLD and CPLD s 27 Reconfigurable I/O ports s Enhanced JTAG Serial Port s Programmable power management s High Endurance:
  – 100,000 Erase/Write Cycles of Flash Memory
  – 10,000 Erase/Write Cycles of EEPROM
  – 1,000 Erase/Write Cycles of PLD Figure 1. Packages PQFP52 (T) PLCC52 (K) January 2002 This is preliminary information on a new product now in developmen.