HY5S5B6GLF-SE Hynix Semiconductor 256Mbit (16Mx16bit) Mobile SDR Memory Datasheet, en stock, prix

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HY5S5B6GLF-SE

Hynix Semiconductor
HY5S5B6GLF-SE
HY5S5B6GLF-SE HY5S5B6GLF-SE
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Part Number HY5S5B6GLF-SE
Manufacturer Hynix Semiconductor
Description and is subject to change without notice. Hynix does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev 1.0 / Apr. 2006 1 256Mbit (16Mx16bit) Mobile SDR M...
Features
● Standard SDRAM Protocol Clock Synchronization Operation - All the commands registered on positive edge of basic input clock (CLK)

● MULTIBANK OPERATION - Internal 4bank operation - During burst Read or Write operation, burst Read or Write for a different bank is performed. - During burst Read or Write operation, a different bank is activated and burst Read or Write for that bank is performed - During auto precharge burst Read or Write, burst Read or Write for a different bank is performed
● Power Supply Voltage : VDD = 1.8V, VDDQ = 1.8V LVCMOS compatible I/O Interface Low Voltage int...

Document Datasheet HY5S5B6GLF-SE Data Sheet
PDF 2.99MB
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