HY5S5B2CLFP-HE |
Part Number | HY5S5B2CLFP-HE |
Manufacturer | Hynix Semiconductor |
Description | and is subject to change without notice. Hynix does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev 1.5 / Aug. 2008 1 11 256Mbit (8Mx32bit) Mobile SDR... |
Features |
● Standard SDRAM Protocol Clock Synchronization Operation - All the commands registered on positive edge of basic input clock (CLK) ● ● MULTIBANK OPERATION - Internal 4bank operation - During burst Read or Write operation, burst Read or Write for a different bank is performed. - During burst Read or Write operation, a different bank is activated and burst Read or Write for that bank is performed - During auto precharge burst Read or Write, burst Read or Write for a different bank is performed ● Power Supply Voltage: VDD = 1.8V, VDDQ = 1.8V LVCMOS compatible I/O Interface Low Voltage inte... |
Document |
HY5S5B2CLFP-HE Data Sheet
PDF 1.09MB |
Distributor | Stock | Price | Buy |
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No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | HY5S5B2CLFP-6E |
Hynix Semiconductor |
256M (8Mx32bit) Mobile SDRAM | |
2 | HY5S5B2CLFP-SE |
Hynix Semiconductor |
256M (8Mx32bit) Mobile SDRAM | |
3 | HY5S5B2BLF-6E |
Hynix Semiconductor |
256M (8Mx32bit) Mobile SDRAM | |
4 | HY5S5B2BLF-HE |
Hynix Semiconductor |
256M (8Mx32bit) Mobile SDRAM | |
5 | HY5S5B2BLF-SE |
Hynix Semiconductor |
256M (8Mx32bit) Mobile SDRAM |