M13S256328A |
Part Number | M13S256328A |
Manufacturer | Elite Semiconductor Memory Technology |
Description | (M13S256328A) Pin Name Function Address inputs - Row address A0~A11 - Column address A0~A7, A9 A8/AP : AUTO Precharge BA0, BA1 : Bank selects (4 Banks) Data-in/Data-out Row address strobe Column addre... |
Features |
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M13S256328A
2M x 32 Bit x 4 Banks Double Data Rate SDRAM
JEDEC Standard Internal pipelined double-data-rate architecture, two data access per clock cycle Bi-directional data strobe (DQS) On-chip DLL Differential clock inputs (CLK and CLK ) DLL aligns DQ and DQS transition with CLK transition Quad bank operation CAS Latency : 2; 2.5; 3 Burst Type : Sequential and Interleave Burst Length : 2, 4, 8, full page Full page burst length for sequential burst type only Start address of the full page burst should be even All inputs except data & DM are sampled ... |
Document |
M13S256328A Data Sheet
PDF 856.85KB |
Distributor | Stock | Price | Buy |
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No. | Parte # | Fabricante | Descripción | Hoja de Datos |
---|---|---|---|---|
1 | M13S2561616A |
Elite Semiconductor Memory Technology |
4M x 16 Bit x 4 Banks Double Data Rate SDRAM | |
2 | M13S128168A |
Elite Semiconductor Memory Technology |
2M x 16 Bit x 4 Banks Double Data Rate SDRAM | |
3 | M13S128324A |
ESMT |
Double Data Rate SDRAM | |
4 | M13S32321A |
Elite Semiconductor Memory Technology |
256K x 32 Bit x 4 Banks Double Data Rate SDRAM | |
5 | M13S5121632A |
ESMT |
Double Data Rate SDRAM |