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CY7C335 |
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| Part Number | CY7C335 |
| Manufacturer | Cypress Semiconductor |
| Description | The CY7C335 is a high-performance, erasable, programmable logic device (EPLD) whose architecture has been optimized to enable the user to easily and efficiently construct very high performance state m... |
| Features |
• 100-MHz output registered operation • Twelve I/O macrocells, each having: — Registered, three-state I/O pins — Input and output register clock select multiplexer — Feed back multiplexer • • • • • • • • • • — Output enable (OE) multiplexer Bypass on input and output registers All twelve macrocell state registers can be hidden User configurable I/O macrocells to implement JK or RS flip-flops and T or D registers Input multiplexer per pair of I/O macrocells allows I/O pin associated with a hidden macrocell state register to be saved for use as an input Four dedicated hidden registers Twelve ded... |
| Document |
 CY7C335 Data Sheet
PDF 342.27KB |
| Distributor | Stock | Price | Buy |
|---|
| No. | Parte # | Fabricante | Descripción | Hoja de Datos |
|---|---|---|---|---|
| 1 | CY7C331 |
Cypress Semiconductor |
Asynchronous Registered EPLD |
|
| 2 | CY7C325 |
Cypress |
Timing Control Unit |
|
| 3 | CY7C340 |
Cypress |
Multiple Array Matrix High-Density EPLDs |
|
| 4 | CY7C341B |
Cypress Semiconductor |
192-Macrocell MAX EPLD |
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| 5 | CY7C342 |
Cypress |
128-Macrocell MAX EPLDs |
|