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UR5596 |
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| Part Number | UR5596 |
| Manufacturer | UTC |
| Description | The UTC UR5596 is a linear bus termination regulator and designed to meet JEDEC SSTL-2(Stub-Series Terminated Logic) specifications for termination of DDR-SDRAM. It also can be used in SSTL-3 or HSTL ... |
| Features |
* Source and sink current * Low output voltage offset * No external resistors required * Linear topology * Suspend To Ram (STR) functionality * Low external component count * Thermal shutdown protection
CMOS IC
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QW-R502-045.E
UR5596
ORDERING INFORMATION Ordering Number Lead Free Halogen Free UR5596L-S08-R UR5596G-S08-R UR5596L-SH2-R UR5596G-SH2-R Package SOP-8 HSOP-8 CMOS IC Packing Tape Reel Tape Reel MARKING PIN CONFIGURATION PIN DESCRIPTION PIN NO. SOP-8 HSOP-8 1 1 2 2 3 3 4 4 5 5... |
| Document |
 UR5596 Data Sheet
PDF 351.47KB |
| Distributor | Stock | Price | Buy |
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