S71WS512N |
Part Number | S71WS512N |
Manufacturer | SPANSION |
Description | - Package and Pin Layout There are also a few hardware changes required for the migration. Since the entire S29WS512P is addressed with a single chip select, address line A24 has to be connected. Not... |
Features |
between the two flash device cores. Table 1.1 Comparison of Key Features
Futures Technology Process Rule VCC VIO (VCCQ) Max Density Configuration Register Sector Architecture Bank Architecture Bank Size Boot Option Common Flash Interface (CFI) Simultaneous Read/Write Asynchronous Read Mode Page Mode Read Page Size Synchronous (Burst) Read Mode Burst Frequency Burst Length Single Word / Write Buffer Program Write Buffer Size Program Suspend / Program Resume Sector Erase / Chip Erase Erase Suspend / Erase Resume Unlock Bypass / Fast Mode Accelerated Program / Chip Erase Sector Protection Secured... |
Document |
S71WS512N Data Sheet
PDF 602.61KB |
Distributor | Stock | Price | Buy |
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No. | Parte # | Fabricante | Descripción | Hoja de Datos |
---|---|---|---|---|
1 | S71WS512N |
SPANSION |
Stacked Multi-Chip Product (MCP) | |
2 | S71WS512NX0 |
SPANSION |
Stacked Multi-Chip Product (MCP) | |
3 | S71WS512P |
SPANSION |
Burst Mode Flash Memory | |
4 | S71WS512P |
SPANSION |
Migrating from the S71WS512N to the S71WS512P | |
5 | S71WS-J |
SPANSION |
Stacked Multi-Chip Product (MCP) |