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etcTI BUF DataSheet

No. Partie # Fabricant Description Fiche Technique
1
LC125A

Texas Instruments
Quadruple Bus Buffer Gate

•1 3-State Outputs
• Separate OE for all 4 buffers
• Operates From 1.65 V to 3.6 V
• Specified From
  –40°C to 85°C and
  –40°C to 125°C
• Inputs Accept Voltages to 5.5 V
• Max tpd of 4.8 ns at 3.3 V
• Typical VOLP (Output Ground Bounce) < 0.8 V at VCC =
Datasheet
2
LC244A

Texas Instruments
Octal Buffer/Driver

• Operates From 1.65 V to 3.6 V
• Inputs Accept Voltages to 5.5 V
• Specified From
  –40°C to +85°C and
  –40°C to +125°C
• Maximum tpd of 5.9 ns at 3.3 V
• Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C
• Typical VOHV (Output VOH
Datasheet
3
CD74HC241

Texas Instruments
High-Speed CMOS Logic Octal Buffer/Line Drivers

• HC/HCT240 Inverting
• HC/HCT241 Non-inverting
• HC/HCT244 Non-inverting
• Typical propagation delay = 8ns at VCC = 5 V, CL = 15 pF, TA = 25℃ for HC240
• Three-state outputs
• Buffered inputs
• High-current bus driver outputs
• Fanout (over temperat
Datasheet
4
54HCT244

Texas Instruments
High-Speed CMOS Logic Octal Buffer/Line Drivers

• HC/HCT240 Inverting
• HC/HCT241 Non-inverting
• HC/HCT244 Non-inverting
• Typical propagation delay = 8ns at VCC = 5 V, CL = 15 pF, TA = 25℃ for HC240
• Three-state outputs
• Buffered inputs
• High-current bus driver outputs
• Fanout (over temperat
Datasheet
5
74HC241

Texas Instruments
High-Speed CMOS Logic Octal Buffer/Line Drivers

• HC/HCT240 Inverting
• HC/HCT241 Non-inverting
• HC/HCT244 Non-inverting
• Typical propagation delay = 8ns at VCC = 5 V, CL = 15 pF, TA = 25℃ for HC240
• Three-state outputs
• Buffered inputs
• High-current bus driver outputs
• Fanout (over temperat
Datasheet
6
DAC0830

Texas Instruments
Double-Buffered DAC
1
•234 Double-Buffered, Single-Buffered or FlowThrough Digital Data Inputs
• Easy Interchange and Pin-Compatible with 12bit DAC1230 Series
• Direct Interface to All Popular Microprocessors
• Linearity Specified with Zero and Full Scale Adjust Only—NO
Datasheet
7
74126

Texas Instruments
QUADRUPLE BUS BUFFERS
three-state outputs that, when enabled, have the low impedance characteristics of a TTL output with additional drive capability at high logic levels to permit driving heavily loaded bus lines without external pullup resistors. When disabled, both out
Datasheet
8
54HCT240

Texas Instruments
High-Speed CMOS Logic Octal Buffer/Line Drivers

• HC/HCT240 Inverting
• HC/HCT241 Non-inverting
• HC/HCT244 Non-inverting
• Typical propagation delay = 8ns at VCC = 5 V, CL = 15 pF, TA = 25℃ for HC240
• Three-state outputs
• Buffered inputs
• High-current bus driver outputs
• Fanout (over temperat
Datasheet
9
54ACT16241

Texas Instruments
16-Bit Buffer/Drivers
or one 16-bit buffer. These devices provide true outputs and complementary output-enable (OE and OE) inputs. 54ACT16241 . . . WD PACKAGE 74ACT16241 . . . DL PACKAGE (TOP VIEW) 1OE 1Y1 1Y2 GND 1Y3 1Y4 VCC 2Y1 2Y2 GND 2Y3 2Y4 3Y1 3Y2 GND 3Y3 3Y4 VCC
Datasheet
10
TL32088

Texas Instruments
Differential Analog Buffer Amplifier
70°C TL32088CNS TL32088 can convert input signals from single-ended to differential and differential to single-ended. The TL32088 also implements a single-ended to single-ended and differential to differential amplifier buffer. The differential
Datasheet
11
CD4049UBE

Texas Instruments
CMOS Hex Inverting Buffer/Converter

• CD4049UB Inverting
• CD4050B Noninverting
• High Sink Current for Driving 2 TTL Loads
• High-to-Low Level Logic Conversion
• 100% Tested for Quiescent Current at 20 V
• Maximum Input Current of 1 µA at 18 V Over Full Package Temperature Range; 100
Datasheet
12
SN54ABT16240A

Texas Instruments
16-BIT BUFFERS/DRIVERS
SN54ABT16240A, SN74ABT16240A 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS095G
  – DECEMBER 1991
  – REVISED OCTOBER 1998 SN54ABT16240A . . . WD PACKAGE SN74ABT16240A . . . DGG, DGV, OR DL PACKAGE (TOP VIEW) 1OE 1 1Y1 2 1Y2 3 GND 4 1Y3 5 1Y4 6 VCC 7
Datasheet
13
CDCLVP1208

Texas Instruments
High-Performance Clock 2:8 Buffer

•1 2:8 Differential Buffer
• Selectable Clock Inputs Through Control terminal
• Universal Inputs Accept LVPECL, LVDS, and LVCMOS/LVTTL
• Eight LVPECL Outputs
• Maximum Clock Frequency: 2 GHz
• Maximum Core Current Consumption: 73 mA
• Very Low Additi
Datasheet
14
54HC240

Texas Instruments
High-Speed CMOS Logic Octal Buffer/Line Drivers

• HC/HCT240 Inverting
• HC/HCT241 Non-inverting
• HC/HCT244 Non-inverting
• Typical propagation delay = 8ns at VCC = 5 V, CL = 15 pF, TA = 25℃ for HC240
• Three-state outputs
• Buffered inputs
• High-current bus driver outputs
• Fanout (over temperat
Datasheet
15
DS42MB100

ETCTI
4.25-Gbps 2:1/1:2 CML MUX/Buffer
Datasheet
16
74AC11241

Texas Instruments
OCTAL BUFFERS/LINE DRIVERS
a high fan-out. The 54AC11241 is characterized for operation over the full military temperature range of
  – 55°C to 125°C. The 74AC11241 is characterized for operation from
  – 40°C to 85°C. 54AC11241, 74AC11241 OCTAL BUFFERS/LINE DRIVERS WITH 3-STATE
Datasheet
17
SN74LV1T34

Texas Instruments
Single Power Supply Single Buffer GATE

• Latch-up performance exceeds 250mA per JESD 17
• Single-supply voltage translator at 5V, 3.3V, 2.5V, and 1.8V VCC
• Operating range of 1.65V to 5.5V
• Up translation:
  – 1.2V(1) to 1.8V at 1.8V VCC
  – 1.5V(1) to 2.5V at 2.5V VCC
  – 1.8V(1) to 3.3V at
Datasheet
18
SN54AHC540

Texas Instruments
Octal Buffers/Drivers

•1 Operating Range 2-V to 5.5-V VCC
• Latch-Up Performance Exceeds 250 mA Per JESD 17
• On Products Compliant to MIL-PRF-38535, All Parameters Are Tested Unless Otherwise Noted. On All Other Products, Production Processing Does Not Necessarily Includ
Datasheet
19
CD4049UBF

Texas Instruments
CMOS Hex Inverting Buffer/Converter

• CD4049UB Inverting
• CD4050B Noninverting
• High Sink Current for Driving 2 TTL Loads
• High-to-Low Level Logic Conversion
• 100% Tested for Quiescent Current at 20 V
• Maximum Input Current of 1 µA at 18 V Over Full Package Temperature Range; 100
Datasheet
20
SNJ54HC240W

Texas Instruments
OCTAL BUFFERS AND LINE DRIVERS
and bus-oriented receivers and transmitters. The ’HC240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high,
Datasheet



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