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etcTI AM1 DataSheet

No. Partie # Fabricant Description Fiche Technique
1
AM1808

Texas Instruments
ARM Microprocessor
1
• 375- and 456-MHz ARM926EJ-S™ RISC MPU
• ARM926EJ-S Core
  – 32-Bit and 16-Bit ( Thumb®) Instructions
  – Single-Cycle MAC
  – ARM Jazelle® Technology
  – Embedded ICE-RT™ for Real-Time Debug
• ARM9™ Memory Architecture
  – 16KB of Instruction Cache
  – 16KB
Datasheet
2
AM1810

Texas Instruments
ARM Microprocessor
1
• 375-MHz ARM926EJ-S™ RISC MPU
• ARM926EJ-S Core
  – 32-Bit and 16-Bit ( Thumb®) Instructions
  – Single-Cycle MAC
  – ARM Jazelle® Technology
  – Embedded ICE-RT™ for Real-Time Debug
• ARM9™ Memory Architecture
  – 16KB of Instruction Cache
  – 16KB of Data C
Datasheet
3
AM1802

Texas Instruments
ARM Microprocessor
1
• 300-MHz ARM926EJ-S™ RISC MPU
• ARM926EJ-S Core
  – 32-Bit and 16-Bit ( Thumb®) Instructions
  – Single-Cycle MAC
  – ARM Jazelle® Technology
  – Embedded ICE-RT™ for Real-Time Debug
• ARM9™ Memory Architecture
  – 16KB of Instruction Cache
  – 16KB of Data C
Datasheet
4
AM1806

Texas Instruments
ARM Microprocessor
1
• 375- and 456-MHz ARM926EJ-S™ RISC MPU
• Enhanced Direct Memory Access Controller 3 (EDMA3):
  – 2 Channel Controllers
  – 3 Transfer Controllers
  – 64 Independent DMA Channels
  – 16 Quick DMA Channels
  – Programmable Transfer Burst Size
• 1.8-V or 3.3-V
Datasheet
5
TVP5150AM1

ETCTI
TVP5150AM1 Ultralow-Power NTSC/PAL/SECAM Video Decoder (Rev. E)
Datasheet
6
TVP5150AM1-EP

ETCTI
Ultralow Power NTSC/PAL/SECAM Video Decoder
Datasheet
7
AM1707

Texas Instruments
ARM Microprocessor
1
• 375- and 456-MHz ARM926EJ-S™ RISC Core
  – 32-Bit and 16-Bit (Thumb®) Instructions
  – Single-Cycle MAC
  – ARM Jazelle® Technology
  – Embedded ICE-RT™ for Real-Time Debug
• ARM9™ Memory Architecture
  – 16KB of Instruction Cache
  – 16KB of Data Cache
  – 8K
Datasheet
8
AM1705

Texas Instruments
ARM Microprocessor
1
• 375- and 456-MHz ARM926EJ-S™ RISC Core
  – 32-Bit and 16-Bit (Thumb®) Instructions
  – Single-Cycle MAC
  – ARM Jazelle® Technology
  – Embedded ICE-RT™ for Real-Time Debug
• ARM9™ Memory Architecture
  – 16KB of Instruction Cache
  – 16KB of Data Cache
  – 8K
Datasheet



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