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Texas Instruments |
Octal Buffers/Drivers •1 Operating Range 2-V to 5.5-V VCC • Latch-Up Performance Exceeds 250 mA Per JESD 17 • On Products Compliant to MIL-PRF-38535, All Parameters Are Tested Unless Otherwise Noted. On All Other Products, Production Processing Does Not Necessarily Includ |
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Texas Instruments |
OCTAL TRANSPARENT D-TYPE LATCHE evels of the D inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines |
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Texas Instruments |
16-Bit Buffers/Drivers •1 Members of the Texas Instruments Widebus™ Family • EPIC™ (Enhanced-Performance Implanted CMOS) Process • Operating Range 2-V to 5.5-V VCC • Distributed VCC and GND Pins Minimize High-Speed Switching Noise • Flow-Through Architecture Optimizes PCB |
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Texas Instruments |
HEX INVERTER 1 • Operating Range 2-V to 5.5-V • Latch-Up Performance Exceeds 250 mA Per JESD 17 • ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) SN54AHC04 . . . JORWP ACKAGE |
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Texas Instruments |
HEX INVERTER 1 • Operating Range 2-V to 5.5-V • Latch-Up Performance Exceeds 250 mA Per JESD 17 • ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) SN54AHC04 . . . JORWP ACKAGE |
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Texas Instruments |
Hex Schmitt-Trigger Inverters •1 ESD Protection Exceeds JESD 22: – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) • Operating Range: 2 V to 5.5 V • ±8-mA Output Drive at 5 V • Schmitt-Trigger Inputs Enable Input Noise Resistan |
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Texas Instruments |
16-BIT BUFFERS/DRIVERS ce state. SN54AHC16540 . . . WD PACKAGE SN74AHC16540 . . . DGG, DGV, OR DL PACKAGE (TOP VIEW) 1OE1 1Y1 1Y2 GND 1Y3 1Y4 VCC 1Y5 1Y6 GND 1Y7 1Y8 2Y1 2Y2 GND 2Y3 2Y4 VCC 2Y5 2Y6 GND 2Y7 2Y8 2OE1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 2 |
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Texas Instruments |
Quadruple 2-Input Positive-AND Gate • 2V to 5.5V operating range • Latch-up performance exceeds 250mA per JESD 17 • ESD protection exceeds JESD 22 2 Applications • Servers • Network Switches • PCs and Notebooks • Electronic Points of Sale 3 Description The SNx4AHC08 devices are quadr |
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Texas Instruments |
QUADRUPLE 2-INPUT POSITIVE-NOR GATE ed-Device Model (C101) PW PACKAGE (TOP VIEW) 1Y 1 1A 2 1B 3 2Y 4 2A 5 2B 6 GND 7 14 VCC 13 4Y 12 4B 11 4A 10 3Y 9 3B 8 3A description/ordering information The ’AHC02 device contains four independent 2-input NOR gates that perform the Boolean fun |
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Texas Instruments |
Quadruple Bus Buffer Gates • Operating range of 2V to 5.5V • Latch-up performance exceeds 250mA per JESD 17 • Four individual output enable pins 2 Applications • Flow Meters • Programmable Logic Controllers • Power Over Ethernet (PoE) • Motor Drives and Controls • Electronic P |
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Texas Instruments |
Quadruple Bus Buffer Gates • Inputs are TTL-voltage compatible • Latch-up performance exceeds 250mA per JESD 17 2 Applications • Enable or disable a digital signal • Controlling an indicator LED • Debounce a switch • Eliminate slow or noisy input signals 3 Description The ’A |
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Texas Instruments |
HEX INVERTER MBER 2003 D OR PW PACKAGE (TOP VIEW) 1A 1 1Y 2 2A 3 2Y 4 3A 5 3Y 6 GND 7 14 VCC 13 6A 12 6Y 11 5A 10 5Y 9 4A 8 4Y description/ordering information The SN74AHC04 contains six independent inverters. This device performs the Boolean function Y = A. |
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Texas Instruments |
HEX INVERTER ternal connection ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING PDIP – N Tube SN74AHC05N SN74AHC05N SOIC – D Tube Tape and reel SN74AHC05D SN74AHC05DR AHC05 –40°C to 85°C SSOP – DB Tape and reel SN74AHC05DBR |
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Texas Instruments |
QUADRUPLE 2-INPUT POSITIVE-NAND GATE |
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Texas Instruments |
QUADRUPLE POSITIVE-NAND GATES and negative-going signals. These circuits are temperature compensated and can be triggered from the slowest of input ramps and still give clean jitter-free output signals. 3 2 1 20 19 1Y 4 18 4A NC 5 17 NC 2A 6 16 4Y NC 7 15 NC 2B 8 14 3 |
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Texas Instruments |
QUADRUPLE POSITIVE-NAND GATES and negative-going signals. These circuits are temperature compensated and can be triggered from the slowest of input ramps and still give clean jitter-free output signals. 3 2 1 20 19 1Y 4 18 4A NC 5 17 NC 2A 6 16 4Y NC 7 15 NC 2B 8 14 3 |
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Texas Instruments |
QUADRUPLE BUS BUFFER GATES OE 1 1A 2 1Y 3 2OE 4 2A 5 2Y 6 GND 7 14 VCC 13 4OE 12 4A 11 4Y 10 3OE 9 3A 8 3Y description The SN74AHCT126 device is a quadruple bus buffer gate featuring independent line drivers with 3-state outputs. Each output is disabled when the associated |
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Texas Instruments |
QUADRUPLE BUS BUFFER GATE RKING −40°C to 125°C SOIC − D TSSOP − PW Tape and reel Tape and reel SN74AHCT125QDRQ1 AHCT125Q SN74AHCT125QPWRQ1 HB125Q † For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see |
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Texas Instruments |
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS rmation NC − No internal connection The ’AHC138 decoders/demultiplexers are designed for high-performance memory-decoding and data-routing applications that require very short propagation-delay times. In high-performance memory systems, these decod |
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Texas Instruments |
DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS output pulse-duration control by three methods. In the first method, the A input is low, and the B input goes high. In the second method, the B input is high, and the A input goes low. In the third method, the A input is low, the B input is high, and |
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