No. | Partie # | Fabricant | Description | Fiche Technique |
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Toshiba |
(TC5053P / TC5054P) 4 Digital Up/Down Decade Counter |
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Toshiba |
(TC5514P/AP/APL) 1024 x 4-Bit CMOS Static RAM |
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Toshiba |
32 GBIT (4G X 8 BIT) CMOS NAND E2PROM Organization Device capacity Register Page size Block size TC58NVG5T2HTA00 9216 516 1064 8 bits 9216 8 9216 bytes (4128K 516K) bytes Modes Read, Reset, Auto Page Program, Auto Block Erase, Status Read, Multi Page Program, Multi Page Re |
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Toshiba Semiconductor |
(TC55257xxx) Silicon Gate CMOS |
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Toshiba |
64 GBIT (8G X 8 BIT) CMOS NAND E2PROM • Organization Device capacity Register Page size Block size • TC58NVG6DDJTA00 17664 × 256 × 2130 × 8 bits 17664 × 8 bits 17664 bytes (4M + 320 K) bytes Modes Read, Reset, Auto Page Program, Auto Block Erase, Status Read, Page Copy, Multi Page Progr |
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Toshiba |
1 GBIT (128M x 8 BIT) CMOS NAND E2PROM • Organization x8 Memory cell array 2112 × 64K × 8 Register 2112× 8 Page size 2112 bytes Block size (128K + 4K) bytes • Modes Read, Reset, Auto Page Program, Auto Block Erase, Status Read, Page Copy, ECC Status Read • Mode control Serial i |
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Toshiba |
SILICON GATE CMOS PSEUDO STATIC RAM a static RAM-like interface with a write cycle in which the input data is written into the memory cell at the rising edge of RIW thus simplifying the microprocessor interface. The TC518512PL is available in a 32-pin, 0.6 inch width plastic DIP, a sma |
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Toshiba |
SILICON GATE CMOS STATIC RAM with an operating current of 5mNMHz fup.) and a minimum cycle time of 85ns. When CE is a logical high, the device is placed in a low power standby mode in which the standby current is 2J,lA at room tem- perature. The TC55257BPL has two control inputs |
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Toshiba |
(TC5047AP-1/-2) 1024 Word X 4-Bit CMOS RAM |
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Toshiba |
SILICON GATE CMOS STATIC RAM low power dissipation when the device is deselected using chip enable (CE1, CE2) and has an output enable input (OE) for fast memory access. The TC55B88P/J is suitable for use in high speed applications such as cache memory and high speed storage. Al |
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Toshiba |
64 GBIT (8G X 8 BIT) CMOS NAND E2PROM Organization Memory cell array Register Page size Block size TC58NVG6D2G 8832 512K 8 8832 8 8832 bytes (2M 160 K) bytes Modes Read, Reset, Auto Page Program, Auto Block Erase, Status Read, Page Copy, Multi Page Program, Multi Block Erase |
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Toshiba |
32 GBIT (4G X 8 BIT) CMOS NAND E2PROM • Organization Memory cell array Register Page size Block size • TC58NVG5D2F 8640 × 512K × 8 8640 × 8 8640 bytes (1M + 56 K) bytes Modes Read, Reset, Auto Page Program, Auto Block Erase, Status Read, Page Copy, Multi Page Program, Multi Block Erase, |
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Toshiba Semiconductor |
STATIC RAM with a maximum operating current of 5mA/rnIz and minimum cycle time of 100nsi l20ns. Hhen CE is a logic |
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Toshiba |
SILICON GATE CMOS PSEUDO STATIC RAM a static RAM-like interface with a write cycle in which the input data is written into the memory cell at the rising edge of RIW thus simplifying the microprocessor interface. The TC518512PL is available in a 32-pin, 0.6 inch width plastic DIP, a sma |
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Toshiba |
SILICON GATE CMOS STATIC RAM with an operating current of 5mNMHz (typ.) and a minimum cycle time of 70ns. When CE1 is a logical high, or CE2 is low, the device is placed in a low power standby mode in which the standby current is 2j.tA typically. The TC551 001 BPL has three cont |
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Toshiba |
SILICON GATE CMOS STATIC RAM with an operating Current of 5mNMHz (typ.) and a minimum cycle time of 70ns. When CE1 is a logical high, or CE2 is low, the device is placed in a low power standby mode in which the standby current is 2~ typically. The TC551 001 APL has three control |
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Toshiba |
512M-BIT (64M x 8 BITS) CMOS NAND E2PROM • Organization Memory cell allay 528 × 128K × 8 Register 528 × 8 Page size 528 bytes Block size (16K + 512) bytes • Modes Read, Reset, Auto Page Program, Auto Block Erase, Status Read • Mode control Serial input/output Command control • Po |
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Toshiba |
256 Word x 4-Bit CMOS RAM |
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Toshiba |
SILICON GATE CMOS STATIC RAM with an operating current of 5mAlMHz iliP.) and a minimum cycle time of 85ns. When CE is a logical high, the device is placed in a low power standby mode in which the standby current is 2~ at room temperature. The TC55257CPI has two control inputs. C |
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Toshiba |
Dual 50/64 Stage Static Shift Register |
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