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Toshiba C55 DataSheet

No. Partie # Fabricant Description Fiche Technique
1
2SC5589

Toshiba Semiconductor
NPN TRANSISTOR
Time Storage Time Fall Time ICBO IEBO V (BR) CEO hFE (1) hFE (2) hFE (3) VCE (sat) VBE (sat) fT Cob tstg (1) tf (1) tstg (2) tf (2) VCB = 1500 V, IE = 0 VEB = 5 V, IC = 0 IC = 10 mA, IB = 0 VCE = 5 V, IC = 2 A VCE = 5 V, IC = 7 A VCE = 5 V, IC = 1
Datasheet
2
TC5514P

Toshiba
(TC5514P/AP/APL) 1024 x 4-Bit CMOS Static RAM
Datasheet
3
TC55257CPL

Toshiba Semiconductor
(TC55257xxx) Silicon Gate CMOS
Datasheet
4
C5587

Toshiba Semiconductor
2SC5587
Datasheet
5
TC55257BSPL-10LV

Toshiba
SILICON GATE CMOS STATIC RAM
with an operating current of 5mNMHz fup.) and a minimum cycle time of 85ns. When CE is a logical high, the device is placed in a low power standby mode in which the standby current is 2J,lA at room tem- perature. The TC55257BPL has two control inputs
Datasheet
6
TC55B88J-12

Toshiba
SILICON GATE CMOS STATIC RAM
low power dissipation when the device is deselected using chip enable (CE1, CE2) and has an output enable input (OE) for fast memory access. The TC55B88P/J is suitable for use in high speed applications such as cache memory and high speed storage. Al
Datasheet
7
TC551001BFTL-70L

Toshiba
SILICON GATE CMOS STATIC RAM
with an operating current of 5mNMHz (typ.) and a minimum cycle time of 70ns. When CE1 is a logical high, or CE2 is low, the device is placed in a low power standby mode in which the standby current is 2j.tA typically. The TC551 001 BPL has three cont
Datasheet
8
TC55257AF-12

Toshiba Semiconductor
STATIC RAM
with a maximum operating current of 5mA/rnIz and minimum cycle time of 100nsi l20ns. Hhen CE is a logic
Datasheet
9
TC551001ATRL-85LT

Toshiba
SILICON GATE CMOS STATIC RAM
with an operating Current of 5mNMHz (typ.) and a minimum cycle time of 70ns. When CE1 is a logical high, or CE2 is low, the device is placed in a low power standby mode in which the standby current is 2~ typically. The TC551 001 APL has three control
Datasheet
10
TC5501P

Toshiba
256 Word x 4-Bit CMOS RAM
Datasheet
11
TC55257CSPI-85L

Toshiba
SILICON GATE CMOS STATIC RAM
with an operating current of 5mAlMHz iliP.) and a minimum cycle time of 85ns. When CE is a logical high, the device is placed in a low power standby mode in which the standby current is 2~ at room temperature. The TC55257CPI has two control inputs. C
Datasheet
12
TC55257CTRL-10

Toshiba
SILICON GATE CMOS STATIC RAM
with an operating current of 5mNMHz iliP.) and a minimum cycle time of 70ns. When CE is a logical high, the device is placed in a low power standby mode in which the standby current is 2jlA at room temperature. The TC55257CPL has two control inputs.
Datasheet
13
TC551001BFL-70L

Toshiba Semiconductor
SILICON GATE CMOS STATIC RAM
with an operating current of 5mA/MHz (typ.) and a minimum cycle time of 70ns. When CE1 is a logical high, or CE2 is low, the device is placed in a low power standby mode in which the standby current is 2µA typically. The TC551001BPL has three control
Datasheet
14
TC554161FTL-70L

Toshiba
SILICON GATE CMOS STATIC RAM
with an operating current of 10mNMHz (typ.) and a minimum cycle time of 70ns. When CE is a logical high, the device is placed in a low power standby mode in which the standby current is 601-!A (max.). The TC554161 FTUfRL has two control inputs. A chi
Datasheet
15
TC551001BPL-70L

Toshiba
SILICON GATE CMOS STATIC RAM
with an operating current of 5mNMHz (typ.) and a minimum cycle time of 70ns. When CE1 is a logical high, or CE2 is low, the device is placed in a low power standby mode in which the standby current is 2j.tA typically. The TC551 001 BPL has three cont
Datasheet
16
TC551001BTRL-70

Toshiba
SILICON GATE CMOS STATIC RAM
with an operating current of 5mNMHz (typ.) and a minimum cycle time of 70ns. When CE1 is a logical high, or CE2 is low, the device is placed in a low power standby mode in which the standby current is 2jJA typically. The TC551 001 BPL has three contr
Datasheet
17
TC551001ATRL-70LT

Toshiba
SILICON GATE CMOS STATIC RAM
with an operating Current of 5mNMHz (typ.) and a minimum cycle time of 70ns. When CE1 is a logical high, or CE2 is low, the device is placed in a low power standby mode in which the standby current is 2~ typically. The TC551 001 APL has three control
Datasheet
18
TC55257BPL-10L

Toshiba
SILICON GATE CMOS STATIC RAM
with an operating current of 5mNMHz illP.) and a minimum cycle time of 85ns. When CE is a logical high, the device is placed in a low power standby mode in which the standby current is 2~ at room temperature. The TC55257BPL has two control inputs. Ch
Datasheet
19
TC55257CFL-70L

Toshiba
SILICON GATE CMOS STATIC RAM
with an operating current of 5mNMHz (typ.) and a minimum cycle time of 70ns. When CE is a logical high, the device is placed in a low power standby mode in which the standby current is 21lA at room temperature. The TC55257CPL has two control inputs.
Datasheet
20
TC5565APL-10

Toshiba Semiconductor
Static RAM
with a maximum operating current of 5mA/MHz and maximum access time of 100ns/120ns/150ns. When CE2 is a logical low or \CEl is a logical high, the device is placed in low power standby mode in which standby current is 2uA typically. The TC5565APL/
Datasheet



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