No. | Partie # | Fabricant | Description | Fiche Technique |
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Toshiba Semiconductor |
NPN TRANSISTOR Time Storage Time Fall Time ICBO IEBO V (BR) CEO hFE (1) hFE (2) hFE (3) VCE (sat) VBE (sat) fT Cob tstg (1) tf (1) tstg (2) tf (2) VCB = 1500 V, IE = 0 VEB = 5 V, IC = 0 IC = 10 mA, IB = 0 VCE = 5 V, IC = 2 A VCE = 5 V, IC = 7 A VCE = 5 V, IC = 1 |
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Toshiba |
(TC5514P/AP/APL) 1024 x 4-Bit CMOS Static RAM |
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Toshiba Semiconductor |
(TC55257xxx) Silicon Gate CMOS |
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Toshiba Semiconductor |
2SC5587 |
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Toshiba |
SILICON GATE CMOS STATIC RAM with an operating current of 5mNMHz fup.) and a minimum cycle time of 85ns. When CE is a logical high, the device is placed in a low power standby mode in which the standby current is 2J,lA at room tem- perature. The TC55257BPL has two control inputs |
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Toshiba |
SILICON GATE CMOS STATIC RAM low power dissipation when the device is deselected using chip enable (CE1, CE2) and has an output enable input (OE) for fast memory access. The TC55B88P/J is suitable for use in high speed applications such as cache memory and high speed storage. Al |
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Toshiba |
SILICON GATE CMOS STATIC RAM with an operating current of 5mNMHz (typ.) and a minimum cycle time of 70ns. When CE1 is a logical high, or CE2 is low, the device is placed in a low power standby mode in which the standby current is 2j.tA typically. The TC551 001 BPL has three cont |
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Toshiba Semiconductor |
STATIC RAM with a maximum operating current of 5mA/rnIz and minimum cycle time of 100nsi l20ns. Hhen CE is a logic |
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Toshiba |
SILICON GATE CMOS STATIC RAM with an operating Current of 5mNMHz (typ.) and a minimum cycle time of 70ns. When CE1 is a logical high, or CE2 is low, the device is placed in a low power standby mode in which the standby current is 2~ typically. The TC551 001 APL has three control |
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Toshiba |
256 Word x 4-Bit CMOS RAM |
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Toshiba |
SILICON GATE CMOS STATIC RAM with an operating current of 5mAlMHz iliP.) and a minimum cycle time of 85ns. When CE is a logical high, the device is placed in a low power standby mode in which the standby current is 2~ at room temperature. The TC55257CPI has two control inputs. C |
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Toshiba |
SILICON GATE CMOS STATIC RAM with an operating current of 5mNMHz iliP.) and a minimum cycle time of 70ns. When CE is a logical high, the device is placed in a low power standby mode in which the standby current is 2jlA at room temperature. The TC55257CPL has two control inputs. |
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Toshiba Semiconductor |
SILICON GATE CMOS STATIC RAM with an operating current of 5mA/MHz (typ.) and a minimum cycle time of 70ns. When CE1 is a logical high, or CE2 is low, the device is placed in a low power standby mode in which the standby current is 2µA typically. The TC551001BPL has three control |
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Toshiba |
SILICON GATE CMOS STATIC RAM with an operating current of 10mNMHz (typ.) and a minimum cycle time of 70ns. When CE is a logical high, the device is placed in a low power standby mode in which the standby current is 601-!A (max.). The TC554161 FTUfRL has two control inputs. A chi |
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Toshiba |
SILICON GATE CMOS STATIC RAM with an operating current of 5mNMHz (typ.) and a minimum cycle time of 70ns. When CE1 is a logical high, or CE2 is low, the device is placed in a low power standby mode in which the standby current is 2j.tA typically. The TC551 001 BPL has three cont |
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Toshiba |
SILICON GATE CMOS STATIC RAM with an operating current of 5mNMHz (typ.) and a minimum cycle time of 70ns. When CE1 is a logical high, or CE2 is low, the device is placed in a low power standby mode in which the standby current is 2jJA typically. The TC551 001 BPL has three contr |
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Toshiba |
SILICON GATE CMOS STATIC RAM with an operating Current of 5mNMHz (typ.) and a minimum cycle time of 70ns. When CE1 is a logical high, or CE2 is low, the device is placed in a low power standby mode in which the standby current is 2~ typically. The TC551 001 APL has three control |
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Toshiba |
SILICON GATE CMOS STATIC RAM with an operating current of 5mNMHz illP.) and a minimum cycle time of 85ns. When CE is a logical high, the device is placed in a low power standby mode in which the standby current is 2~ at room temperature. The TC55257BPL has two control inputs. Ch |
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Toshiba |
SILICON GATE CMOS STATIC RAM with an operating current of 5mNMHz (typ.) and a minimum cycle time of 70ns. When CE is a logical high, the device is placed in a low power standby mode in which the standby current is 21lA at room temperature. The TC55257CPL has two control inputs. |
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Toshiba Semiconductor |
Static RAM with a maximum operating current of 5mA/MHz and maximum access time of 100ns/120ns/150ns. When CE2 is a logical low or \CEl is a logical high, the device is placed in low power standby mode in which standby current is 2uA typically. The TC5565APL/ |
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