Toshiba C51 fiche technique

No.	Partie #	Fabricant	Description
1	C5198	Toshiba Semiconductor	Silicon NPN Transistor hin the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/"Derating Concept and Methods") and individual reliability data (i.e. reliability test
2	C5149	Toshiba Semiconductor	2SC5149
3	C5171	Toshiba Semiconductor	2SC5171 eliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/Derating Concept and Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). 1 2006-11-10 Free Datashe
4	C5197	Toshiba Semiconductor	2SC5197 IC = 6 A, IB = 0.6 A VBE VCE = 5 V, IC = 4 A fT VCE = 5 V, IC = 1 A Cob VCB = 10 V, IE = 0, f = 1 MHz Note: hFE (1) classification R: 55 to 110, O: 80 to 160 JEDEC ― JEITA ― TOSHIBA 2-16C1A Weight: 4.7 g (typ.) Min Typ. Max Unit ― ― 5.0 µA
5	TC518512PL-10LV	Toshiba	SILICON GATE CMOS PSEUDO STATIC RAM a static RAM-like interface with a write cycle in which the input data is written into the memory cell at the rising edge of RIW thus simplifying the microprocessor interface. The TC518512PL is available in a 32-pin, 0.6 inch width plastic DIP, a sma
6	TC518512TRL-10LV	Toshiba	SILICON GATE CMOS PSEUDO STATIC RAM a static RAM-like interface with a write cycle in which the input data is written into the memory cell at the rising edge of RIW thus simplifying the microprocessor interface. The TC518512PL is available in a 32-pin, 0.6 inch width plastic DIP, a sma
7	C5196	Toshiba Semiconductor	2SC5196 reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/Derating Concept and Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). 1 2006-11-10 2SC5196 El
8	TC518128BFL-10V	Toshiba	SILICON GATE CMOS PSEUDO STATIC RAM a static RAM-like interface with a write cycle in which the input data is written into the memory cell at the rising edge of RMI thus simplifying the microprocessor interface. The TC518128B-V is pin-compatible with the 1M bit CMOS static RAM JEDEC st
9	TC518129AFTL-12LV	Toshiba	SILICON GATE CMOS PSEUDO STATIC RAM a static RAM-like interface with a write cycle in which the input data is written into the memory cell at the rising edge of RIW thus simplifying the microprocessor interface. A CS standby mode interface is incorporated in the TC518129A-LV family, wi
10	TC518129AFWL-10LV	Toshiba	SILICON GATE CMOS PSEUDO STATIC RAM a static RAM-like interface with a write cycle in which the input data is written into the memory cell at the rising edge of RIW thus simplifying the microprocessor interface. A CS standby mode interface is incorporated in the TC518129A-LV family, wi
11	C5122	Toshiba	2SC5122 olute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/Derating Concept and Methods) and individual reliability data (i.e. reliability test report and
12	TC511002J-12	Toshiba	DRAM include single power supply of 5V±10% tolerance, direct interfacing capability with high performance logic families such as Schottky TTL. "Test Mode" function is implemented from Revision C. FEATURES • 1,048,576 words by 1 bit organization • Fast a
13	TC511632FTL-70	Toshiba	SILICON GATE CMOS PSEUDO STATIC RAM a static RAM-like interface with a write cycle in which the input data is written into the memory cell at the rising edge of WE thus simplifying the microprocessor interface. The TC511632FUFTL is available in a 40-pin small outline plastic flat packa
14	TMP82C51AM-10	Toshiba Semiconductor	PROGRAMMABLE COMMUNICATION INTERFACE
15	TC518129APL-10LV	Toshiba	SILICON GATE CMOS PSEUDO STATIC RAM a static RAM-like interface with a write cycle in which the input data is written into the memory cell at the rising edge of RIW thus simplifying the microprocessor interface. A CS standby mode interface is incorporated in the TC518129A-LV family, wi
16	C5148	Toshiba Semiconductor	2SC5148
17	TC518129BPL-80L	Toshiba	CMOS Pseudo Static RAM
18	TC518129AFWL-10	Toshiba	CMOS Pseudo Static RAM
19	TC518129AFL-80LV	Toshiba	SILICON GATE CMOS PSEUDO STATIC RAM a static RAM-like interface with a write cycle in which the input data is written into the memory cell at the rising edge of RIW thus simplifying the microprocessor interface. A CS standby mode interface is incorporated in the TC518129A-LV family, wi
20	2SC5154	Toshiba Semiconductor	NPN TRANSISTOR mA, IB = 50 mA VCE = 5 V, IC = 500 mA VCE = 10 V, IC = 100 mA VCB = 10 V, IC = 0, f = 1 MHz Note: hFE classification O: 70 to 140, Y: 120 to 240 Marking JEDEC ― JEITA ― TOSHIBA 2-8M1A Weight: 0.55 g (typ.) Min Typ. Max Unit ― ― 1.0 µA ― ―