No. | Partie # | Fabricant | Description | Fiche Technique |
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Silicon Laboratories |
8/4/2 kB ISP Flash MCU |
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Silicon Laboratories |
1 KV THREE TO SIX-CHANNEL DIGITAL ISOLATORS High-speed operation Default high or low output DC to 10 Mbps Precise timing (typical) No start-up initialization required 40 ns propagation delay Wide Operating Supply Voltage 20 ns pulse width distortion 3.15 – 5.5 V 10 |
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Silicon Laboratories |
8/4/2 kB ISP Flash MCU |
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Silicon Laboratories |
8K ISP FLASH MCU ator: Crystal, RC, C, or Clock Can switch between clock sources on-the-fly Typical operating current: 9 mA at 25 MHz Typical stop mode current: <0.1 uA Memory Two comparators Digital Peripherals VDD Monitor and Brown-out Detector www.DataSheet4U |
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Silicon Laboratories |
1 KV THREE TO SIX-CHANNEL DIGITAL ISOLATORS High-speed operation Default high or low output DC to 10 Mbps Precise timing (typical) No start-up initialization required 40 ns propagation delay Wide Operating Supply Voltage 20 ns pulse width distortion 3.15 – 5.5 V 10 |
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Silicon Laboratories |
Mixed Signal ISP Flash MCU |
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Silicon Laboratories |
Mixed Signal ISP Flash MCU |
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Silicon Laboratories |
Full Speed USB Flash MCU rmance to emulation systems using ICE-chips, target pods, and sockets Voltage Supply Input: 2.7 to 5.25 V - Voltages from 3.6 to 5.25 V supported using On-Chip Voltage Regulator HIgh Speed 8051 μC Core - Pipelined instruction architecture; executes |
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Silicon Laboratories |
Mixed-Signal 16KB ISP FLASH MCU or: 2 –16 MHz External oscillator: Crystal, RC, C, or Clock Can switch between clock sources on-the-fly Typical operating current: 12.5 mA at 25 MHz Multiple power saving sleep and shutdown modes Memory Two Comparators Internal Voltage Reference VD |
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Silicon Laboratories |
8K ISP FLASH MCU .................................................................................. 26 1.2. On-Chip Memory............................................................................................... 27 1.3. JTAG Debug and Boundary Scan............. |
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Silicon Laboratories |
Mixed Signal ISP Flash MCU |
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Silicon Laboratories |
Mixed Signal ISP Flash MCU |
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Silicon Laboratories |
Mixed Signal ISP Flash MCU |
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Silicon Laboratories |
Mixed Signal ISP Flash MCU |
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Silicon Laboratories |
Mixed-Signal Byte-Programmable EPROM MCU |
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Silicon Laboratories |
Mixed Signal ISP Flash MCU 0 to +125 °C C8051F58x/F59x Mixed Signal ISP Flash MCU Family Memory - 8448 bytes internal data RAM (256 + 8192 XRAM) - 128 or 96 kB Banked Flash; In-system programma- ble in 512-byte Sectors - External 64 kB data memory interface programma- ble for |
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Silicon Laboratories |
Mixed-Signal 32KB ISP FLASH MCU Chips, Target Pods, and Sockets - IEEE1149.1 Compliant Boundary Scan - Low Cost Development Kit HIGH SPEED 8051 C CORE - Pipelined Instruction Architecture; Executes 70% of Instruction Set in 1 or 2 System Clocks - Up to 25MIPS Throughput with 25M |
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Silicon Laboratories |
Mixed-Signal 32KB ISP FLASH MCU Chips, Target Pods, and Sockets - IEEE1149.1 Compliant Boundary Scan - Low Cost Development Kit HIGH SPEED 8051 C CORE - Pipelined Instruction Architecture; Executes 70% of Instruction Set in 1 or 2 System Clocks - Up to 25MIPS Throughput with 25M |
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Silicon Laboratories |
Mixed-Signal 32KB ISP FLASH MCU Chips, Target Pods, and Sockets - IEEE1149.1 Compliant Boundary Scan - Low Cost Development Kit HIGH SPEED 8051 C CORE - Pipelined Instruction Architecture; Executes 70% of Instruction Set in 1 or 2 System Clocks - Up to 25MIPS Throughput with 25M |
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Silicon Laboratories |
Mixed-Signal 32KB ISP FLASH MCU Chips, Target Pods, and Sockets - IEEE1149.1 Compliant Boundary Scan - Low Cost Development Kit HIGH SPEED 8051 C CORE - Pipelined Instruction Architecture; Executes 70% of Instruction Set in 1 or 2 System Clocks - Up to 25MIPS Throughput with 25M |
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