| No. | Partie # | Fabricant | Description | Fiche Technique |
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Samsung semiconductor |
(SSS6N60 / SSS6N55) N CHANNEL POWER MOSFETS |
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Samsung semiconductor |
8Mx64 SDRAM SODIMM based on 8Mx16 • Performance range Part No. M464S0924DTS-L7C/C7C M464S0924DTS-L7A/C7A M464S0924DTS-L1H/C1H M464S0924DTS-L1L/C1L Max Freq. (Speed) 133MHz (7.5ns @ CL=2) 133MHz (7.5ns @ CL=3) 100MHz (10ns @ CL=2) 100MHz (10ns @ CL=3) Burst mode operation Auto & self |
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Samsung |
N-Channel Power MOSFETS |
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Samsung semiconductor |
64Mb H-die SDRAM Specification 54 TSOP-II • JEDEC standard 3.3V power supply • LVTTL compatible with multiplexed address • Four banks operation • MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave) • All |
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Samsung |
N-Channel Power MOSFETS |
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Samsung |
DDR SDRAM Registered Module • Power supply : Vdd: 2.5V ± 0.2V, Vddq: 2.5V ± 0.2V • Double-data-rate architecture; two data transfers per clock cycle • Bidirectional data strobe(DQS) • Differential clock inputs(CK and CK) • DLL aligns DQ and DQS transition with CK transition • P |
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Samsung |
DDR SDRAM Registered Module • Power supply : Vdd: 2.5V ± 0.2V, Vddq: 2.5V ± 0.2V • Double-data-rate architecture; two data transfers per clock cycle • Bidirectional data strobe(DQS) • Differential clock inputs(CK and CK) • DLL aligns DQ and DQS transition with CK transition • P |
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Samsung semiconductor |
(IRFP130 - IRFP133) N-CHANNEL POWER MOSFETS |
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Samsung semiconductor |
(IRFP130 - IRFP133) N-CHANNEL POWER MOSFETS |
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Samsung semiconductor |
(IRFP130 - IRFP133) N-CHANNEL POWER MOSFETS |
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Samsung semiconductor |
512Mb D-die DDR SDRAM Specification 66 TSOP-II ...............................................................................................................................4 2.0 Ordering Information ................................................................................................ |
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Samsung semiconductor |
64Mb H-die SDRAM Specification 54 TSOP-II • JEDEC standard 3.3V power supply • LVTTL compatible with multiplexed address • Four banks operation • MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave) • All |
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Samsung semiconductor |
64Mb H-die SDRAM Specification 54 TSOP-II • JEDEC standard 3.3V power supply • LVTTL compatible with multiplexed address • Four banks operation • MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave) • All |
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Samsung |
SDRAM Unbuffered Module |
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Samsung |
N-Channel Power Mosfets |
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Samsung |
DDR SDRAM Registered Module • Power supply : Vdd: 2.5V ± 0.2V, Vddq: 2.5V ± 0.2V • Double-data-rate architecture; two data transfers per clock cycle • Bidirectional data strobe(DQS) • Differential clock inputs(CK and CK) • DLL aligns DQ and DQS transition with CK transition • P |
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Samsung |
DDR SDRAM Registered Module • Power supply : Vdd: 2.5V ± 0.2V, Vddq: 2.5V ± 0.2V • Double-data-rate architecture; two data transfers per clock cycle • Bidirectional data strobe(DQS) • Differential clock inputs(CK and CK) • DLL aligns DQ and DQS transition with CK transition • P |
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Samsung |
DDR SDRAM Registered Module • Power supply : Vdd: 2.5V ± 0.2V, Vddq: 2.5V ± 0.2V • Double-data-rate architecture; two data transfers per clock cycle • Bidirectional data strobe(DQS) • Differential clock inputs(CK and CK) • DLL aligns DQ and DQS transition with CK transition • P |
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Samsung Electronics |
N-Channel Power MOSFETS |
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Samsung semiconductor |
SDRAM Unbuffered SODIMM • Burst mode operation • Auto & self refresh capability (8192 Cycles/64ms) • LVTTL compatible inputs and outputs • Single 3.3V ± 0.3V power supply • MRS cycle with address key programs Latency (Access from column address) Burst length (1, 2, 4, 8) Da |
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