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STMicroelectronics HCT DataSheet

No. Partie # Fabricant Description Fiche Technique
1
54HCT245

STMicroelectronics
Rad-hard high speed 2 to 6V CMOS logic

• ESCC qualified
• 7 V Absolute maximum ratings
• 2 V to 6 V operating voltage for CMOS M54HCxxx series
• 4.5 V to 5.5 V operating voltage for TTL M54HCTxxx series
• Ceramic hermetic packages
• -55 °C to +125 °C operating temperature range
• Radiatio
Datasheet
2
74HCT74

STMicroelectronics
Dual D-Type Flip-Flop
rcuits against static discharge and transient excess voltage. Obsolete ProducPIN CONNECTION AND IEC LOGIC SYMBOLS August 2001 1/10 M74HCT74 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL NAME AND FUNCTION 1,13 1CLR, 2CLR
Datasheet
3
M74HCT4052

STMicroelectronics
DUAL 4-CHANNEL ANALOG MULTIPLEXER/DEMULTIPLEXER
nal and digitally controlled s ro analog switches. OObbsolete P PIN CONNECTION AND IEC LOGIC SYMBOLS DIP SOP TSSOP ORDER CODES PACKAGE TUBE T&R DIP SOP TSSOP M74HCT4052B1R M74HCT4052M1R M74HCT4052RM13TR M74HCT4052TTR A built-in level shifti
Datasheet
4
74VHCT00A

STMicroelectronics
QUAD 2-INPUT NAND GATE
giving them 2KV ESD immunity and transient excess voltage. DESCRIPTION The 74VHCT00A is an advanced high-speed CMOS QUAD 2-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. PIN CONNECTION AND IE
Datasheet
5
74VHCT126A

STMicroelectronics
QUAD BUS BUFFERS
n inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. PIN CONNE
Datasheet
6
74VHCT238A

STMicroelectronics
3 TO 8 LINE DECODER
puts are provided to ease cascade connection and application of this address decoders for memory systems. Power down protection is provided on all inputs and outputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This dev
Datasheet
7
74VHCT245A

STMicroelectronics
OCTAL BUS TRANSCEIVER
(HIGH IMPEDANCE STATE) IT IS REQUESTED TO FIX THE INPUT LEVEL BY MEANS OF EXTERNAL PULL DOWN OR PULL UP RESISTOR. DESCRIPTION The 74VHCT245A is an advanced high-speed CMOS OCTAL BUS TRANSCEIVER (3-STATE) fabricated with sub-micron silicon gate and
Datasheet
8
74VHCT04A

STMicroelectronics
HEX INVERTER
ity and transient excess voltage. DESCRIPTION The 74VHCT04A is an advanced high-speed CMOS HEX INVERTER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. PIN CONNECTION AND IEC LOGIC SYMBOLS August 1999 1/7
Datasheet
9
74VHCT05A

STMicroelectronics
HEX INVERTER
d of 3 stages including buffer output, which provides high noise immunity and stable output. PIN CONNECTION AND IEC LOGIC SYMBOLS August 1999 1/7 74VHCT05A INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1, 3, 5, 9, 11, 13 2, 4, 6, 8, 10, 12 7 14
Datasheet
10
74VHCT14A

STMicroelectronics
HEX SCHMITT INVERTER

■ High speed: tPD = 5.5ns (typ.) at VCC = 5V
■ Low power dissipation: ICC = 2 µA (Max.) at TA = 25°C
■ Typical hysteresis: Vh = 0.7V at VCC = 4.5V
■ Power down protection on inputs & outputs
■ Symmetrical output impedance: |IOH| = IOL = 8 mA (Min)
Datasheet
11
74VHCT20A

STMicroelectronics
DUAL 4-INPUT NAND GATE
the supply voltage. This device can be used to interface 5V to 3V. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS
Datasheet
12
74VHCT240A

STMicroelectronics
Octal Bus Buffer
scharge, giving them 2KV ESD immunity and transient excess voltage. DESCRIPTION The 74VHCT240A is an advanced high-speed CMOS OCTAL BUS BUFFER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. PIN CON
Datasheet
13
74VHCT27A

STMicroelectronics
TRIPLE 3-INPUT NOR GATE
to the supply voltage. This device can be used to interface 5V to 3V. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMB
Datasheet
14
74VHCT573A

STMicroelectronics
OCTAL D-TYPE LATCH
is held at a high level, the Q outputs will follow the data inputs precisely. When the LE is taken low, the Q outputs will be latched precisely at the logic level of D input data. While the (OE) input is low, the 8 outputs will be in a normal logic s
Datasheet
15
HCT273

STMicroelectronics
OCTAL D-TYPE FLIP-FLOP
Datasheet
16
M74HCT158

STMicroelectronics
QUAD 2 CHANNEL MULTIPLEXER
The HCT158 is an inverting multiplexer while the HCT157 is a non-inverting multiplexer. When the STROBE input is held High, selection of data is inhibited and all the outputs become Low in the M74HCT157 and High in the M74HCT158. The SELECT decoding
Datasheet
17
M74HCT157

STMicroelectronics
QUAD 2 CHANNEL MULTIPLEXER
The HCT158 is an inverting multiplexer while the HCT157 is a non-inverting multiplexer. When the STROBE input is held High, selection of data is inhibited and all the outputs become Low in the M74HCT157 and High in the M74HCT158. The SELECT decoding
Datasheet
18
74VHCT02A

STMicroelectronics
QUAD 2-INPUT NOR GATE
ESD immunity and transient excess voltage. DESCRIPTION The 74VHCT02A is an advanced high-speed CMOS QUAD 2-INPUT NOR GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. PIN CONNECTION AND IEC LOGIC SYMBOLS
Datasheet
19
74VHCT03A

STMicroelectronics
QUAD 2-INPUT OPEN DRAIN NAND GATE
QUAD 2-INPUT OPEN DRAIN NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 3 stages including buffer output, which provides high noise immunity and stable output. Thi
Datasheet
20
74VHCT138A

STMicroelectronics
3 TO 8 LINE DECODER INVERTING
ecoding function is inhibited and all the 8 outputs go to high. Three enable inputs are provided to ease cascade connection and application of address decoders for memory systems. Power down protection is provided on all inputs and outputs and 0 to 7
Datasheet



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