| No. | Partie # | Fabricant | Description | Fiche Technique |
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Renesas |
4M SRAM • Single 5 V supply: 5 V ± 10% • Access time: 55/70 ns (max) • Power dissipation: Active: 10 mW/MHz (typ) Standby: 4 µW (typ) • Completely static memory. No clock or timing strobe required • Equal access and cycle times • Common data input and |
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Renesas |
256Kb Advanced LPSRAM • • • • • • • • Single 2.7~3.6V power supply Small stand-by current: 1µA (3.0V, typical) No clocks, No refresh All inputs and outputs are TTL compatible. Easy memory expansion by CS# Common Data I/O Three-state outputs: OR-tie Capability OE# prevents |
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Renesas |
256Kb Advanced LPSRAM • • • • • • • • Single 2.7~3.6V power supply Small stand-by current: 1µA (3.0V, typical) No clocks, No refresh All inputs and outputs are TTL compatible. Easy memory expansion by CS# Common Data I/O Three-state outputs: OR-tie Capability OE# prevents |
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Renesas |
256Kb Advanced LPSRAM • • • • • • • • Single 2.7~3.6V power supply Small stand-by current: 1µA (3.0V, typical) No clocks, No refresh All inputs and outputs are TTL compatible. Easy memory expansion by CS# Common Data I/O Three-state outputs: OR-tie Capability OE# prevents |
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Renesas |
4M SRAM • Single 5 V supply: 5 V ± 10% • Access time: 55/70 ns (max) • Power dissipation: Active: 10 mW/MHz (typ) Standby: 4 µW (typ) • Completely static memory. No clock or timing strobe required • Equal access and cycle times • Common data input and |
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Renesas Technology |
Wide Temperature Range Version 16M SRAM • Single 3.0 V supply: 2.7 V to 3.6 V • Fast access time: 45/55 ns (max) • Power dissipation: Active: 9 mW/MHz (typ) Standby: 1.5 µW (typ) • Completely static memory. No clock or timing strobe required • Equal access and cycle times • Common da |
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Renesas Technology |
16Mb Advanced LPSRAM • Single 2.7-3.6V power supply • Small stand-by current:2µA (3.0V, typ.) • Data retention supply voltage =2.0V • No clocks, No refresh • All inputs and outputs are TTL compatible • Easy memory expansion by CS1#, CS2, LB# and UB# • Common Data I/O • T |
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Renesas |
256Kb Advanced LPSRAM • • • • • • • • Single 2.7~3.6V power supply Small stand-by current: 1µA (3.0V, typical) No clocks, No refresh All inputs and outputs are TTL compatible. Easy memory expansion by CS# Common Data I/O Three-state outputs: OR-tie Capability OE# prevents |
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Renesas |
256Kb Advanced LPSRAM • • • • • • • • Single 2.7~3.6V power supply Small stand-by current: 1µA (3.0V, typical) No clocks, No refresh All inputs and outputs are TTL compatible. Easy memory expansion by CS# Common Data I/O Three-state outputs: OR-tie Capability OE# prevents |
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Renesas |
4M SRAM • Single 3.0 V supply: 2.7 V to 3.6 V • Fast access time: 55/70 ns (max) • Power dissipation: Standby: 3 µW (typ) (VCC = 3.0 V) • Equal access and cycle times • Common data input and output. Three state output • Battery backup operation. 2 chip |
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Renesas |
4M SRAM • Single 5 V supply: 5 V ± 10% • Access time: 55/70 ns (max) • Power dissipation: Active: 10 mW/MHz (typ) Standby: 4 µW (typ) • Completely static memory. No clock or timing strobe required • Equal access and cycle times • Common data input and |
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Renesas Technology |
16Mb Advanced LPSRAM • Single 2.7-3.6V power supply • Small stand-by current:2µA (3.0V, typ.) • Data retention supply voltage =2.0V • No clocks, No refresh • All inputs and outputs are TTL compatible • Easy memory expansion by CS1#, CS2, LB# and UB# • Common Data I/O • T |
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Renesas Technology |
16Mb Advanced LPSRAM • Single 2.7-3.6V power supply • Small stand-by current:2µA (3.0V, typ.) • Data retention supply voltage =2.0V • No clocks, No refresh • All inputs and outputs are TTL compatible • Easy memory expansion by CS1#, CS2, LB# and UB# • Common Data I/O • T |
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Renesas |
Wide Temperature Range Version 4M SRAM • Single 3 V supply: 2.7 V to 3.6 V • Access time: 55/70 ns (max) • Power dissipation: Active: 6 mW/MHz (typ) Standby: 1.5 µW (typ) • Completely static memory. No clock or timing strobe required • Equal access and cycle times • Common data inpu |
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Renesas |
Wide Temperature Range Version 4M SRAM • Single 3 V supply: 2.7 V to 3.6 V • Access time: 55/70 ns (max) • Power dissipation: Active: 6 mW/MHz (typ) Standby: 1.5 µW (typ) • Completely static memory. No clock or timing strobe required • Equal access and cycle times • Common data inpu |
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Renesas |
Wide Temperature Range Version 4M SRAM • Single 3 V supply: 2.7 V to 3.6 V • Access time: 55/70 ns (max) • Power dissipation: Active: 6 mW/MHz (typ) Standby: 1.5 µW (typ) • Completely static memory. No clock or timing strobe required • Equal access and cycle times • Common data inpu |
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Renesas |
Wide Temperature Range Version 4M SRAM • Single 3 V supply: 2.7 V to 3.6 V • Access time: 55/70 ns (max) • Power dissipation: Active: 6 mW/MHz (typ) Standby: 1.5 µW (typ) • Completely static memory. No clock or timing strobe required • Equal access and cycle times • Common data inpu |
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Renesas |
256Kb Advanced LPSRAM • • • • • • • • Single 4.5V~5.5V power supply Small stand-by current: 1µA (5.0V, typical) No clocks, No refresh All inputs and outputs are TTL compatible. Easy memory expansion by CS# Common Data I/O Three-state outputs: OR-tie Capability OE# prevent |
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Renesas |
256Kb Advanced LPSRAM • • • • • • • • Single 4.5V~5.5V power supply Small stand-by current: 1µA (5.0V, typical) No clocks, No refresh All inputs and outputs are TTL compatible. Easy memory expansion by CS# Common Data I/O Three-state outputs: OR-tie Capability OE# prevent |
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Renesas |
256Kb Advanced LPSRAM • • • • • • • • Single 4.5V~5.5V power supply Small stand-by current: 1µA (5.0V, typical) No clocks, No refresh All inputs and outputs are TTL compatible. Easy memory expansion by CS# Common Data I/O Three-state outputs: OR-tie Capability OE# prevent |
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