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Quad Digitally Controlled Potentiometers Low Noise Low Power I2C • Four potentiometers in one package • 256 resistor taps - 0.4% resolution • I2C serial interface • Wiper resistance: 70 typical @ |
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3.3 VOLT DUAL CMOS FIFO • The IDT72V801 is equivalent to two IDT72V201 256 x 9 FIFOs • The IDT72V811 is equivalent to two IDT72V211 512 x 9 FIFOs • The IDT72V821 is equivalent to two IDT72V221 1,024 x 9 FIFOs • The IDT72V831 is equivalent to two IDT72V231 2,048 x 9 FIFOs • |
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Clock Generator The 8413S12I-100 is a PLL-based clock generator specifically designed for Cavium Networks Octeon II processors. This high performance device is optimized to generate the processor core reference clock, the PCI-Express reference clocks and the clocks |
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Differential HCSL Clock Generator • Two 0.7V differential HCSL outputs: configurable for PCIe (100MHz or 200MHz) and sRIO (125MHz) clock signals • One LVCMOS/LVTTL reference clock output • Selectable crystal oscillator interface, 25MHz, 18pF parallel resonant crystal or LVCMOS/LVTTL |
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PCIe Gen1-4 Buffer • Eight 1 –200MHz Low-Power (LP) HCSL DIF pairs Key Specifications • DIF cycle-to-cycle jitter < 50ps • DIF output-to-output skew < 50ps • DIF additive phase jitter is < 100fs rms for PCIe Gen4 • DIF additive phase jitter < 300fs rms for 12kHz –20MHz B |
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HCSL/ LVCMOS Clock Generator • Ten selectable 100MHz, 125MHz, 156.25MHz and 312.5MHz clocks for PCI Express, sRIO and GbE, HCSL interface levels • One single-ended QG LVCMOS/LVTTL clock output at 125MHz • One single-ended QF LVCMOS/LVTTL clock output at 50MHz, 15 output impedan |
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High Performance Industry Standard Single-Ended Current Mode PWM Controller include 30V operation, low operating current, 90A start-up current, adjustable operating frequency to 2MHz, and high peak current drive capability with 20ns rise and fall times. PART NUMBER ISL8840A ISL8841A ISL8842A ISL8843A ISL8844A ISL8845A RIS |
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12-PIN ULTRA SHRINK SOP PHOTOCOUPLER • Ultra small and thin package (12-pin ultra shrink SOP, Pin pitch 0.8 mm, 4.4 (L) 5.6 (W) 2.5 (H)) • Common lead PS2841-4A: cathode, collector common PS2841-4B: anode, collector common • High current transfer ratio (CTR = 200% TYP. @ IF = 1 |
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Crystal-to-HCSL Clock Generator • Eight HCSL outputs: configurable for PCIe (100MHz) and sRIO (125MHz) clock signals • Selectable crystal oscillator interface, 25MHz, 18pF parallel resonant crystal or LVCMOS/LVTTL single-ended reference clock input • Supports the following output f |
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PCI Clock Generator • One 0.7V current mode differential HCSL output pair • Crystal oscillator interface: 25MHz • Output frequency: 100MHz • RMS period jitter: 3ps (maximum) • Cycle-to-cycle jitter: 35ps (maximum) • I2C support with readback capabilities up to 400kHz • |
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Crystal-to-HCSL Clock Generator • Four differential HCSL clock outputs: configurable for sRIO (125MHz or 156.25MHz) clock signals One REF_OUT LVCMOS/LVTTL clock output • Selectable crystal oscillator interface, 25MHz, 18pF parallel resonant crystal or LVCMOS/LVTTL single-ended refe |
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NG Crystal-to-LVDS/HCSL Clock Synthesizer ▪ Fourth generation FemtoClock® (NG) technology ▪ Selectable 250MHz, 156.25MHz, 125MHz or 100MHz output clock synthesized from a 25MHz fundamental mode crystal ▪ Four differential clock outputs (two LVDS and two HCSL outputs) ▪ Crystal interface desi |
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NG Crystal-to-HCSL Frequency Synthesizer • Fourth generation FemtoClock® Next Generation (NG) technology • Three differential HCSL outputs, one differential LVPECL and two single-ended LVCMOS/LVTTL outputs • Crystal oscillator interface designed for a 25MHz, 12pF parallel resonant crystal • |
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Very Low-Power PCIe Gen1-4 Clock Generator ▪ Eight 100MHz Low-Power HCSL (LP-HCSL) DIF pairs with Zo = 100Ω ▪ One 1.8V LVCMOS REF output with Wake-On-LAN (WOL) support Key Specifications ▪ DIF cycle-to-cycle jitter < 50ps ▪ DIF output-to-output skew < 50ps ▪ DIF phase jitter is PCIe Gen1 –4 co |
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Clock Generator The 8413S09 is a PLL-based clock generator specifically designed for the Cavium Networks OCTEON Plus 58xx family of processors and Advanced Mezzanine Card (AMC) applications. This high performance device is optimized to generate the processor core r |
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18M-BIT DDR II SRAM 4-WORD BURST OPERATION • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (13 x 15) • HSTL interface • PLL circuitry for wide output data valid window and future frequency scaling • Pipelined double data rate operation • Common data input/output bus • Two-tick burst for low |
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Zero-Delay/Fanout Buffer ▪ 2 to 8 Low-Power HCSL (LP-HCSL) outputs eliminate 4 resistors per output pair ▪ 9DBLxx4x devices provide integrated 100Ω terminations ▪ 9DBLxx5x devices provide integrated 85Ω terminations ▪ See AN-891 for easy coupling to other logic families ▪ Sp |
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2 to 8-Output 3.3V PCIe Zero-Delay/Fanout Buffers ▪ 2 to 8 Low-Power HCSL (LP-HCSL) outputs eliminate 4 resistors per output pair ▪ 9DBL0x4x devices provide integrated 100Ω terminations ▪ 9DBL0x5x devices provide integrated 85Ω terminations ▪ See AN-891 for easy coupling to other logic families ▪ Sp |
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Improved Industry Standard Single-Ended Current Mode PWM Controller include low operating current, 60µA start-up current, adjustable operating frequency to 2MHz, and high peak current drive capability with 20ns rise and fall times. Part Number ISL6840 ISL6841 ISL6842 ISL6843 ISL6844 Rising UVLO (V) 7.0 7.0 14.4 8.4 |
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RRIO Operational Amplifiers are a low supply current of 390µA maximum per channel at room temperature, a low bias current, and a wide input voltage range, which enables the ISL28x14 devices to be excellent general purpose op amps for a wide range of applications. The ISL28114 i |
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