| No. | Partie # | Fabricant | Description | Fiche Technique |
|---|---|---|---|---|
|
|
|
Renesas |
MCU The M16C/65 Group microcomputer (MCU) incorporates the M16C/60 Series CPU core and flash memory, employing sophisticated instructions for a high level of efficiency. This MCU has 1 MB of address space (expandable to 4 MB), and it is capable of execut |
|
|
|
|
Renesas |
Multiple Linear Power Controller • Provides 2 ACPI-Controlled Voltages - 5VDUAL USB/Keyboard/Mouse - 3.3VDUAL/3.3VSB PCI/Auxiliary/LAN • Excellent 3.3VDUAL Regulation in S3/S4/S5 - ±2.0% Over-Temperature - 1A Capability on ISL6506A - 2A Capability on ISL6506B • Small Size; Very Low |
|
|
|
|
Renesas |
SYSTEM PERIPHERAL CLOCK SOURCE • Packaged in 20-pin SSOP (QSOP) • Pb (lead) free package, RoHS compliant • Lower jitter version of ICS650-01 • Operating voltage of 3.3 V or 5 V • Zero ppm synthesis error in all clocks • Inexpensive 25 MHz crystal or clock input • Provides Ethernet |
|
|
|
|
Renesas |
18-bit Universal Bus Transceivers • VCC = 2.3 V to 3.6 V • Typical VOL ground bounc |
|
|
|
|
Renesas |
NETWORKING SYSTEM CLOCK • Packaged in 20-pin (150 mil) SSOP (QSOP) • 25 MHz fundamental crystal clock or clock input • One fixed output clock of 25 MHz • One bank of four frequency selectable output clocks • Three frequency selectable clocks outputs • Zero ppm synthesis err |
|
|
|
|
Renesas |
ETHERNET SWITCH CLOCK SOURCE • Packaged in 16-pin TSSOP • Operating voltage of 3.3 V • Low power consumption • Input frequency of 25 MHz • Low long-term jitter • Separate supply voltage for clock outputs (2.5 / 3.3 V clock outputs) • OE control capability Block Diagram VDD 2 |
|
|
|
|
Renesas |
NETWORKING CLOCK SOURCE • Packaged in 20-pin (150 mil) SSOP (QSOP) • Pb (lead) free package, RoHS compliant • 12.5 MHz or 25 MHz fundamental crystal or clock input • Six output clocks with selectable frequencies • SDRAM frequencies of 67, 83, 100, and 133 MHz • Buffered cry |
|
|
|
|
Renesas Technology |
Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series e Renesas products for their use. Renesas neither makes warranties or representations with respect to the accuracy or completeness of the information contained in this document nor grants any license to any intellectual property rights or any other r |
|
|
|
|
Renesas |
SPREAD SPECTRUM CLOCK SYNTHESIZER • Packaged in 16-pin TSSOP (173 mil) • Supply voltages: VDD = 3.3 V, VDDO = 2.5 V • Peak-to-peak jitter: ±125 ps typ • Output duty cycle 45/55% (worst case) • 25 MHz crystal or reference clock input • Zero (0) ppm frequency error on all output clocks |
|
|
|
|
Renesas |
NETWORKING CLOCK SOURCE • Packaged in 20-pin tiny SSOP (QSOP) • Pb (lead) free package • 12.5 MHz or 25.00 MHz fundamental crystal or clock input • Six output clocks with selectable frequencies • SDRAM frequencies of 67, 83, 100, and 133 MHz • Buffered crystal reference out |
|
|
|
|
Renesas |
Super Chopper-Stabilized Operational Amplifier • Guaranteed Max Input Offset Voltage for All Temperature Ranges • Low Long-Term and Temperature Drifts of Input Offset Voltage • Guaranteed Max Input Bias Current . . . . . . . . . . . . .10pA • Extremely Wide Common Mode Voltage Range. . . . . . . |
|
|
|
|
Renesas |
4-Channel Integrated LCD Supply • 4V to 14V Input Supply • AVDD Boost Up to 20V, with Integrated 2.8A FET • Integrated VON Charge Pump, Up to 35VOUT • VOFF Charge Pump Driver, Down to -18V • VLOGIC Buck Down to 1.2V, with Integrated 2A FET • Automatic Start-up Sequencing - AVDD -> |
|
|
|
|
Renesas |
SYSTEM PERIPHERAL CLOCK SOURCE • Packaged in 20-pin SSOP (QSOP) • Pb (lead) free package • Operating voltage of 3.3 V or 5 V • Less than one ppm synthesis error in all clocks • Inexpensive 14.31818 MHz crystal or clock input • Provides Ethernet and Fast Ethernet clocks • Provides |
|
|
|
|
Renesas |
3.3V HIGH-DENSITY 36-BIT FIFO • Choose among the following memory organizations:Commercial IDT72V3640 ⎯ 1,024 x 36 IDT72V3650 ⎯ 2,048 x 36 IDT72V3660 ⎯ 4,096 x 36 IDT72V3670 ⎯ 8,192 x 36 IDT72V3680 ⎯ 16,384 x 36 IDT72V3690 ⎯ 32,768 x 36 • Up to 166 MHz Operation of the Clocks • |
|
|
|
|
Renesas |
650nm AlGaInP MQW VISIBLE LASER DIODE d • Optical output power • Low threshold current o • Low operating current Pr • Low operating voltage Po = 5.0 mW Ith = 45 mA TYP. Iop = 60 mA TYP. Vop = 2.2 V TYP. • Wide operating temperature range • Peak emission wavelength • Fundamental transve |
|
|
|
|
Renesas |
Multiple Linear Power Controller • Provides 5 ACPI-Controlled Voltages - 5V Active/Sleep (5VDUAL) - 3.3V Active/Sleep (3.3VDUAL) - 2.5V/3.3V Active/Sleep (2.5/3.3VMEM) - 3.3V Always Present (3.3VSB) - 2.5V Clock (Active Only) (2.5VCLK) • Excellent Output Voltage Regulation - 3.3VDUA |
|
|
|
|
Renesas |
Multiple Linear Power Controller • Provides 5 ACPI-Controlled Voltages - 5VDUAL USB/Keyboard/Mouse (Active/Sleep) - 3.3VDUAL/3.3VSB PCI/Auxiliary/LAN (Active/Sleep) - 2.5VMEM RDRAM (Active/Sleep) - 3.3VMEM SDRAM (Active/Sleep) - 2.5VCLK Clock/Processor Terminations (Active Only) • E |
|
|
|
|
Renesas |
NETWORKING CLOCK SOURCE • Packaged in 20-pin (150 mil) SSOP (QSOP) • Pb (lead) free package, RoHS compliant • 12.5 MHz or 25 MHz fundamental crystal or clock input • Six output clocks with selectable frequencies • SDRAM frequencies of 67, 83, 100, and 133 MHz • Buffered cry |
|
|
|
|
Renesas |
NETWORKING CLOCK SOURCE • Packaged in 20-pin tiny SSOP (QSOP) • Pb (lead) free package • 12.5 MHz or 25.00 MHz fundamental crystal or clock input • Six output clocks with selectable frequencies • SDRAM frequencies of 67, 83, 100, and 133 MHz • Buffered crystal reference out |
|
|
|
|
Renesas |
PRV AND STB CLOCK SOURCE • Packaged in 20-pin narrow SSOP (QSOP) • Pb (lead) free package, RoHS compliant • 27 MHz fundamental crystal or clock input • Zero ppm synthesis error in all clocks • Low skew 33.33 MHz clock outputs • Output enable controls all outputs • Full CMOS |
|