| No. | Partie # | Fabricant | Description | Fiche Technique |
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ON Semiconductor |
Dual Monostable Multivibrators a negative-transitiontriggered input and a positive-transition-triggered input either of which can be used as an inhibit input. Pulse triggering occurs at a voltage level and is not related to the transition time of the input pulse. Schmitt-trigger i |
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ON Semiconductor |
Quad 2-Input NAND Gate Power Supply Current ICC Total, Output HIGH Total, Output LOW 1.6 4.4 mA VCC = MAX – 20 – 0.4 –100 0.5 20 V µA mA mA mA IOL = 8.0 mA 0.4 Min 2.0 0.8 – 1.5 Typ Max Unit V V V V V Test Conditions Guaranteed Input HIGH Voltage for All Inputs Guaranteed |
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ON Semiconductor |
Quad 2-Input AND Gate Current ICC Total, Output HIGH Total, Output LOW 4.8 8.8 mA VCC = MAX – 20 – 0.4 –100 0.5 20 V µA mA mA mA IOL = 8.0 mA 0.4 Min 2.0 0.8 – 1.5 Typ Max Unit V V V V V Test Conditions Guaranteed Input HIGH Voltage for All Inputs Guaranteed Input LOW Vol |
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ON Semiconductor |
Hex Inverter 0.65 – 1.5 2.7 3.5 V VCC = MIN, IIN = – 18 mA V VCC = MIN, IOH = MAX, VIN = VIH or VIL per Truth Table VOL Output LOW Voltage 0.25 0.4 0.35 0.5 V IOL = 4.0 mA VCC = VCC MIN, VIN = VIL or VIH V IOL = 8.0 mA per Truth Table IIH Inp |
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Motorola Semiconductor |
(SN75451 - SN75454) Dual Peripheral Drivers |
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ON Semiconductor |
Octal D Flip-Flop ORDERING INFORMATION Device Package Shipping SN74LS273N PDIP−20 1440 Units/Box SN74LS273DW SOIC−WIDE 38 Units/Rail SN74LS273DWR2 SOIC−WIDE 2500/Tape & Reel SN74LS273M SOEIAJ−20 See Note 1 SN74LS273MEL SOEIAJ−20 See Note 1 1. For ordering |
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ON Semiconductor |
Quad 2-Input OR Gate Parameter VIH Input HIGH Voltage Min Typ Max Unit Test Conditions 2.0 V Guaranteed Input HIGH Voltage for All Inputs VIL Input LOW Voltage 0.8 V Guaranteed Input LOW Voltage for All Inputs VIK Input Clamp Diode Voltage VOH Output HIGH Vo |
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Motorola Semiconductor |
(SN74LS783 / SN74LS785) Synchronous Address Multiplexer |
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ON Semiconductor |
BCD Decade Counters / 4-Bit Binary Counters The counters consist of four edge-triggered D flip-flops with the appropriate data routing networks feeding the D inputs. All changes of the Q outputs (except due to the asynchronous Master Reset in the LS161A) occur as a result of, and synchronous |
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ON Semiconductor |
BCD to 7-Segment Decoder/Driver ith a maximum reverse current of 250 μA. Indicator segments requiring up to 24 mA of current may be driven directly from the SN74LS47 high performance output transistors. Display patterns for BCD input counts above nine are unique symbols to authenti |
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ON Semiconductor |
Octal Transparent Latch D-Type Inputs • Buffered Positive Edge-Triggered Clock • Hysteresis on Clock Input to Improve Noise Margin • Input Clamp Diodes Limit High Speed Termination Effects GUARANTEED OPERATING RANGES Symbol Parameter Min Typ Max Unit VCC Supply Voltag |
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ON Semiconductor |
Octal Transparent Latch D-Type Inputs • Buffered Positive Edge-Triggered Clock • Hysteresis on Clock Input to Improve Noise Margin • Input Clamp Diodes Limit High Speed Termination Effects GUARANTEED OPERATING RANGES Symbol Parameter Min Typ Max Unit VCC Supply Voltag |
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ON Semiconductor |
4-BIT BINARY COUNTER Clock (Active LOW going edge) Input to ÷5 Section (LS90), ÷6 Section (LS92) Clock (Active LOW going edge) Input to ÷8 Section (LS93) Master Reset (Clear) Inputs Master Set (Preset-9, LS90) Inputs Output from ÷2 Section (Notes b & c) Outputs from ÷5 |
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ON Semiconductor |
LOW POWER SCHOTTKY UARANTEED OPERATING RANGES Symbol VCC TA IOH IOL Parameter Supply Voltage Operating Ambient Temperature Range Output Current – High Output Current – Low Min 4.75 0 Typ 5.0 25 Max 5.25 70 – 0.4 8.0 Unit V °C mA mA SOIC D SUFFIX CASE 751B ORDERING IN |
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ON Semiconductor |
Quad 3-State Buffer SOEIAJ−14 See Note 1 SN74LS125AMEL SOEIAJ−14 See Note 1 SN74LS126AN 14 Pin DIP 2000 Units/Box SN74LS126AD SOIC−14 55 Units/Rail SN74LS126ADR2 SOIC−14 2500/Tape & Reel SN74LS126AM SOEIAJ−14 See Note 1 SN74LS126AMEL SOEIAJ−14 See Note 1 1. F |
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ON Semiconductor |
Octal Buffer/Line Driver d ordering and shipping information in the package dimensions section on page 5 of this data sheet. © Semiconductor Components Industries, LLC, 2006 July, 2006 − Rev. 9 1 Publication Order Number: SN74LS240/D SN74LS240, SN74LS244 LOGIC AND CONNEC |
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ON Semiconductor |
8-Bit Addressable Latch tor Components Industries, LLC, 2006 July, 2006 − Rev. 8 16 1 SOEIAJ M SUFFIX CASE 966 ORDERING INFORMATION Device Package Shipping SN74LS259N 16 Pin DIP 2000 Units/Box SN74LS259D SOIC−16 38 Units/Rail SN74LS259DR2 SOIC−16 2500/Tape & Reel |
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ON Semiconductor |
Octal D Flip-Flop 377DW SOIC−WIDE 38 Units/Rail SN74LS377DWR2 SOIC−WIDE 2500/Tape & Reel © Semiconductor Components Industries, LLC, 2006 July, 2006 − Rev. 9 1 Publication Order Number: SN74LS377/D SN74LS377 CONNECTION DIAGRAM DIP (TOP VIEW) VCC Q7 D7 D6 Q6 Q5 D |
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ON Semiconductor |
1-of-10 Decoder ail SN74LS42DR2 SOIC−16 2500/Tape & Reel SN74LS42M SOEIAJ−16 See Note 1 SN74LS42MEL SOEIAJ−16 See Note 1 1. For ordering information on the EIAJ version of the SOIC package, please contact your local ON Semiconductor representative. 1 Publica |
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ON Semiconductor |
BCD to 7-Segment Decoder/Driver ith a maximum reverse current of 250 μA. Indicator segments requiring up to 24 mA of current may be driven directly from the SN74LS47 high performance output transistors. Display patterns for BCD input counts above nine are unique symbols to authenti |
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