ON Semiconductor LV0 fiche technique

No.	Partie #	Fabricant	Description
1	PI90LV032A	Pericom Semiconductor	3V LVDS High-Speed Differential Line Drivers • • • • • • • • • • • Signaling Rates >400Mbps (200 MHz) Single 3.3V Power Supply Design Accepts ±350mV (typical) Differential Swing Maximum Differential Skew of 0.35ns Maximum Propagation Delay of 3.3ns Low Voltage TTL (LVTTL) Outputs Industrial Tem
2	DS90LV017A	National Semiconductor	LVDS Single High Speed Differential Driver n n n n n n n n n n n n n > 600 Mbps (300 MHz) switching rates 0.3 ns typical differential skew 0.7 ns maximum differential skew 1.5 ns maximum propagation delay 3.3V power supply design ± 355 mV differential signaling Low power dissipation (23 mW @
3	PI90LV028A	Pericom Semiconductor	3V LVDS High-Speed Differential Line Drivers • • • • • • • • • • • Signaling Rates >400Mbps (200 MHz) Single 3.3V Power Supply Design Accepts ±350mV (typical) Differential Swing Maximum Differential Skew of 0.35ns Maximum Propagation Delay of 3.3ns Low Voltage TTL (LVTTL) Outputs Industrial Tem
4	DS90LV048A	National Semiconductor	3V LVDS Quad CMOS Differential Line Receiver n n n n n n n n n n n n n n > 400 Mbps (200 MHz) switching rates Flow-through pinout simplifies PCB layout 150 ps channel-to-channel skew (typical) 100 ps differential skew (typical) 2.7 ns maximum propagation delay 3.3V power supply design High imp
5	DS92LV040A	National Semiconductor	4 Channel Bus LVDS Transceiver a flow through pin out which allows easy PCB routing for short stubs between its pins and the connector. The driver translates 3V LVTTL levels (single-ended) to differential Bus LVDS (BLVDS) output levels. This allows for high speed operation while c
6	DS90LV032A	National Semiconductor	3V LVDS Quad CMOS Differential Line Receiver n n n n n n n n n n n n n > 400 Mbps (200 MHz) switching rates 0.1 ns channel-to-channel skew (typical) 0.1 ns differential skew (typical) 3.3 ns maximum propagation delay 3.3V power supply design Power down high impedance on LVDS inputs Low Power d
7	SL74LV04	System Logic Semiconductor	Hex Inverter m Case for 10 seconds (Plastic DIP ), 0.3 mm (SOIC Package) Value -0.5 ~ +7.0 ±20 ±50 ±25 ±50 ±50 750 500 -65 ~ +150 260 Unit V mA mA mA mA mA mW °C °C IOK* 2 Io* 3 IGND ICC PD Tstg TL * Maximum Ratings are those values beyond which damage to th
8	DS90LV028AQ	National Semiconductor	Automotive LVDS Dual Differential Line Receiver ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ AECQ-100 Grade 1 -40°C to +125°C operating temperature range >400 Mbps (200 MHz) switching rates 50 ps differential skew (typical) 0.1 ns channel-to-channel skew (typical) 2.5 ns maximum propagation delay 3.3V power supply d
9	LV0104CS	ON Semiconductor	Halogen-free Digital Ambient Light Sensor bove the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Recommended Operating Conditions at Ta = 25°C Parameter Recommended Supply Voltage Inpu
10	LV0229XA	ON Semiconductor	Front Monitor OE-IC • Photodiode compatible with three wavelengths incorporated, high-speed process employed. • Compact, thin CSP package employed. • Use AR coated glass for three-wavelength (One side). Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Max
11	90LV019	National Semiconductor	DS90LV019 an independent driver and receiver with TTL/CMOS compatibility (DIN and ROUT). The logic interface provides maximum flexibility as 4 separate lines are provided (DIN, DE, RE, and ROUT). The device also features a flow-through pin out which allows eas
12	DS90LV001	National Semiconductor	3.3V LVDS-LVDS Buffer n n n n n n n Single +3.3 V Supply LVDS receiver inputs accept LVPECL signals TRI-STATE outputs Receiver input threshold < ± 100 mV Fast propagation delay of 1.4 ns (typ) Low jitter 800 Mbps fully differential data path 100 ps (typ) of pk-pk jitter w
13	DS90LV012A	National Semiconductor	3V LVDS Single CMOS Differential Line Receiver n n n n n n n n n n n n n n n n n n Compatible with ANSI TIA/EIA-644-A Standard > 400 Mbps (200 MHz) switching rates 100 ps differential skew (typical) 3.5 ns maximum propagation delay Integrated line termination resistor (102Ω typical) Single 3.3V p
14	DS90LV017	National Semiconductor	LVDS Single High Speed Differential Driver n n n n n n n n Ultra Low Power Dissipation Operating Range above 155 Mbps Flow-through pinout simplifies PCB layout Conforms to TIA/EIA-644 Standard 8-Lead SOIC Package Saves Space VCM ± 1V center around 1.2V Low Differential Output Swing Typical 34
15	DS90LV019	National Semiconductor	3.3V or 5V LVDS Driver/Receiver an independent driver and receiver with TTL/CMOS compatibility (DIN and ROUT). The logic interface provides maximum flexibility as 4 separate lines are provided (DIN, DE, RE, and ROUT). The device also features a flow-through pin out which allows eas
16	DS90LV027	National Semiconductor	LVDS Dual High Speed Differential Driver n n n n n n n n Ultra Low Power Dissipation Operating Range above 155 Mbps Flow-through pinout simplifies PCB layout Conforms to TIA/EIA-644 Standard 8-Lead SOIC Package Saves Space VCM ± 1V center around 1.2V Low Differential Output Swing Typical 34
17	DS90LV027A	National Semiconductor	LVDS Dual High Speed Differential Driver n n n n n n n n n n n n n > 600 Mbps (300MHz) switching rates 0.3 ns typical differential skew 0.7 ns maximum differential skew 1.5 ns maximum propagation delay 3.3V power supply design ± 360 mV differential signaling Low power dissipation (46 mW @
18	DS90LV028A	National Semiconductor	3V LVDS Dual CMOS Differential Line Receiver n n n n n n n n n n n n n n > 400 Mbps (200 MHz) switching rates 50 ps differential skew (typical) 0.1 ns channel-to-channel skew (typical) 2.5 ns maximum propagation delay 3.3V power supply design Flow-through pinout Power down high impedance on LV
19	DS90LV028AH	National Semiconductor	High Temperature 3V LVDS Dual Differential Line Receiver n n n n n n n n n n n n -40˚C to +125˚C operating temperature range > 400 Mbps (200 MHz) switching rates 50 ps differential skew (typical) 0.1 ns channel-to-channel skew (typical) 2.5 ns maximum propagation delay 3.3V power supply design Flow-through
20	AS29LV016	Austin Semiconductor	16 Megabit (2M x 8-Bit / 1M x 16-Bit) CMOS 3.0 Volt-Only Boot Sector Flash Memory — A hardware method of locking a sector to prevent any program or erase operations within that sector — Sectors can be locked in-system or via programming equipment — Temporary Sector Unprotect feature allows code changes in previously locked sectors