| No. | Partie # | Fabricant | Description | Fiche Technique |
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Hitachi Semiconductor |
Hex D-Type Flip-Flop with Master Reset • Outputs Source/Sink 24 mA Pin Arrangement MR 1 Q0 2 D0 3 D1 4 Q1 5 D2 6 Q2 7 GND 8 (Top view) 16 VCC 15 Q5 14 D5 13 D4 12 Q4 11 D3 10 Q3 9 CP HD74AC174 Logic Symbol D0 D1 D2 CP MR D3 D4 D5 Q0 Q1 Q2 Q3 Q4 Q5 Pin Names D0 to D5 CP MR Q0 to Q5 |
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Hitachi Semiconductor |
16-bit Registered Transceivers with 3-state Outputs • VCC = 2.3 V to 3.6 V • Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) • Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) • High output current ±24 mA (@V CC = 3.0 V) • Bus hold on data inputs eliminates the need for external pu |
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Hitachi Semiconductor |
Octal D-type Flip Flops with 3-state Outputs • • • • • • VCC = 2.0 V to 5.5 V All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VOUT (Max.) = 5.5 V (@VCC = 0 V or output off state) Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25 °C) Typical VOH undershoot > 2.0 V (@VCC = |
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IK Semiconductor |
4-Bit Synchronous Binary Up/Down Counter allows the counters to be used as devide-by-n by modifying the count lenght with the preset inputs. In addition the counter can also be cleared. This is accomplished by inputting a high on the Master Reset input. All 4 internal stages are set to low |
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Hitachi Semiconductor |
16-bit Buffer / Driver with 3-state Outputs • VCC = 2.3 V to 3.6 V • Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) • Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) • High output current ±12 mA (@VCC = 3.0 V) • All outputs have equivalent 26 Ω series resistors, so no ext |
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IK Semiconductor |
8-Bit Universal Shift/Storage Register a multiplexed parallel input/output data port to achieve full 8-bit handling in a 20 pin package. Due to the large output drive capability and the 3-state feature, this device is ideally suited for interface with bus lines in a bus-oriented system. T |
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IK Semiconductor |
Quad 2-1 Data Selector/Multiplexer -A3,B0-B3=the levels of the respective Data-Word Inputs 1 www.DataSheet4U.com IN74ACT157 MAXIMUM RATINGS* Symbol VCC VIN VOUT IIN IOUT ICC PD Tstg TL * Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Outpu |
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Hitachi Semiconductor |
18-bit Universal Bus Driver with 3-state Outputs and Inverted Latch Enable • Meets “PC SDRAM registered DIMM design support document, Rev. 1.2” • VCC = 2.3 V to 3.6 V • Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) • Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) • High output current ±12 mA (@V CC = |
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IK Semiconductor |
Quad 2-1 Data Selector/Multiplexer B0-B3=the levels of the respective Data-Word Inputs 1 www.DataSheet4U.com IN74ACT158 MAXIMUM RATINGS* Symbol VCC VIN VOUT IIN IOUT ICC PD Tstg TL * Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Vo |
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Fairchild Semiconductor |
Octal 3-STATE Bus Driver the same performance as the standard version with the addition of increased current drive capability to meet the current requirements of various bus architectures. F |
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Hitachi Semiconductor |
Dual 1-of-4 Decoder/Demultiplexer • • • • • Multifunction Capability Two Completely Independent 1-of-4 Decoders Active Low Mutually Exclusive Outputs Outputs Source/Sink 24 mA HD74ACT139 has TTL-Compatible Inputs HD74AC139/HD74ACT139 Pin Arrangement Ea 1 A0a 2 A1a 3 O0a 4 O1a 5 O2a |
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Hitachi Semiconductor |
18-bit Buffers / Drivers with 3-state Outputs • VCC = 2.3 V to 3.6 V • Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) • Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) • High output current ±12 mA (@VCC = 3.0 V) • Bus hold on data inputs eliminates the need for external pul |
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Fairchild Semiconductor |
Octal D-Type Transparent Latch with 3-STATE Outputs s Switching specifications at 50 pF s Switching specifications guaranteed over full temperature and VCC range s Advanced oxide-isolated, ion-implanted Schottky TTL process s Functionally and pin for pin compatible with LS and ALS TTL counterparts s I |
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Fairchild Semiconductor |
Octal Buffer/Line Driver s ICC and IOZ reduced by 50% s Inverting 3-STATE outputs drive bus lines or buffer memory address registers s Outputs source/sink 24 mA s ACT240 has TTL-compatible inputs Ordering Code: Order Number Package Number Package Description 74AC240SC M |
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IK Semiconductor |
Octal Bus Transceiver ata Transmitted from Bus B to Bus A (inverted) Data Transmitted from Bus A to Bus B (inverted) Buses Isolated (High Impedance State) w w w .d e e h s a t a . u t4 m o c L H PIN 20=VCC PIN 10 = GND H X X = don’t care 1 www.DataSheet4U.com |
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IK Semiconductor |
Quad 2-1 Data Selector/Multiplexer uts Y0-Y3 Z A0-A3 B0-B3 w w w .d e e h s a t a . u t4 PIN 16 =VCC PIN 8 = GND m o c L X=don’t care Z = high-impedance state A0-A3,B0-B3=the levels of the respective Nibble Inputs 1 www.DataSheet4U.com IN74AC257 MAXIMUM RATINGS* Symbol V |
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ON Semiconductor |
Quad 2-Input NAND Schmitt Trigger • Schmitt Trigger Inputs • Outputs Source/Sink 24 mA • ′ACT132 Has TTL Compatible Inputs • These are Pb−Free Devices VCC 14 13 12 11 10 9 8 DATA SHEET www.onsemi.com MARKING DIAGRAM 14 14 1 SOIC−14 D SUFFIX CASE 751A XXXXXXG AWLYWW 1 XXX A WL Y |
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Fairchild Semiconductor |
3-STATE Quad 1 of 2 Line Data Selector/Multiplexers s Switching specifications at 50 pF s Switching specifications guaranteed over full temperature and VCC range s Advanced oxide-isolated, ion-implanted Schottky TTL proc |
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Toshiba Semiconductor |
OCTAL BUS TRANSCEIVER |
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ON Semiconductor |
Quad 2-Input NAND Gate • ICC Reduced by 50% • Outputs Source/Sink 24 mA • ACT00 Has TTL−Compatible Inputs 1 A0 2 B0 00 3 A1 4 5 B1 6 01 GND 7 14 VCC 13 A2 12 B2 11 02 10 A3 9 B3 8 03 Figure 1. Connection Diagram IEEE/IEC A0 & B0 00 A1 B1 01 A2 B2 02 A3 B3 |
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