No. | Partie # | Fabricant | Description | Fiche Technique |
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National Semiconductor |
High-Speed / Closed-Loop Buffer n n n n n n n Closed-loop buffer 1750MHz small signal bandwidth 4580V/µs slew rate 0.06% / 0.02˚ differential gain/phase −52dBc THD at 20MHz Single supply operation (3V min.) 75mA output current Applications n n n n n n n n Video switching and routi |
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National Semiconductor |
Digital Video Serializer n SDTV/HDTV serial digital video standard compliant n Supports 270 Mbps, 360 Mbps, 540 Mbps, 1.4835Gbps and 1.485 Gbps SDV data rates with auto-detection n Low output jitter: 125ps max, 85ps typical n Low power: typically 430mW n No external serial d |
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National Semiconductor |
Rail-to-Rail Input and Output Amplifiers (VS = 2.7V, TA = 25˚C, RL = 1kΩ to V+/2, AV = +1. Typical values unless specified). n −3dB BW 55MHz n Supply voltage range 2.5V to 12V n Slew rate 22V/µs n Supply current 650µA/channel n Output short circuit current 42mA ± 20mA n Linear output curren |
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National Semiconductor |
1 GHz Fully Differential Amplifier ■ ■ ■ ■ ■ ■ ■ ■ ■ 1.0 GHz bandwidth @ AV = 1 800 MHz bandwidth @ AV = 4 450 MHz 0.1 dB flatness 3800 V/µs slew rate 10 ns settling time to 0.1% −90 dB THD @ 20 MHz −74 dB THD @ 70 MHz 20 ns enable/shutdown pin 5 to 12V operation Applications ■ ■ ■ ■ |
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National Semiconductor |
Variable Gain Amplifier ■ Gain range ■ Gain step size ■ Combined gain resolution with ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Gsample/second ADC’s Min gain Max gain −3 dB BW Rise/fall time Recovery time Propagation delay variation HD2 @ 100 MHz HD3 @ 100 MHz Input-referred noise (max gain) Pow |
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National Semiconductor Corporation |
3G HD/SD SDI Dual Output Low Power Extended Reach Adaptive Cable Equalizer Features ■ SMPTE 424M, SMPTE 292M, SMPTE 344M, SMPTE 259M, and DVB-ASI compliant ■ Equalizes up to 200 meters of Belden 1694A at 2.97 Gbps, ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ up to 220 meters of Belden 1694A at 1.485 Gbps, or up to 400 meters of Belden 16 |
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National Semiconductor |
Dual Wideband / Low Noise / Voltage Feedback Op Amp n n n n n n n Wide unity gain bandwidth: 300MHz Low noise: 2nV/ Low Distortion: −65/−74dBc (10MHz) Settling time: 12ns to 0.1% Wide supply voltage range: ± 2.5V to ± 6V High output current: ± 85mA Improved replacement for CLC428 Applications n n n n |
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National Semiconductor |
Adaptive Cable Equalizer include separate carrier detect and output mute pins which may be tied together to mute the output when no signal is present. A programmable mute reference is provided to mute the output at a selectable level of signal degradation. Features n SMPTE |
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National Semiconductor |
HD/SD SDI Reclocker n Supports SMPTE 259M (A & C) and SMPTE 292M serial digital video standards n Supports 143 Mbps, 270 Mbps, 1.483 Gbps, and 1.485 Gbps serial data rate operation n Supports DVB-ASI at 270 Mbps n Single 3.3V supply operation n 350 mW typical power cons |
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National Semiconductor |
Digital Cable Driver n SMPTE 292M, SMPTE 344M and SMPTE 259M compliant n Data rates to 1.485 Gbps n Dual differential inputs n Dual 75Ω differential outputs n Two selectable slew rates n Adjustable output amplitude n Single 3.3V supply operation n Commercial temperature |
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National Semiconductor |
Dual / High Output Current / High Speed Op Amp the high output drive with low distortion required for the demanding application of a single supply xDSL line driver. When connected as a differential output driver, the LMH6672 can drive a 50Ω load to 16.8VPP swing with only −93dBc distortion, fully |
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National Semiconductor Corporation |
3 Gbps HD/SD SDI Extended Reach And Configurable Adaptive Cable Equalizer and design enhancements including longer cable equalization, lower output jitter, configurable pin mode and SPI modes, a powersaving sleep mode, and programmable output common mode voltage and swing. The LMH0384 implements DC restoration to correctly |
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National Semiconductor |
(LMH0xxx) DVB-ASI SDI Serializer and Driver ■ ■ ■ ■ ■ LVDS Interface No external VCO or clock required Integrated Variable output Cable Driver 3.3V SMBus configuration interface 48pin LLP package Applications ■ SDI interfaces for: — — — — Video Cameras DVRs Video Switchers Video Editing Syste |
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National Semiconductor |
75 MHz Dual Clock Buffer (Typical values are: VSUPPLY = 2.7V and CL = 10 pF, unless otherwise specified.) 78 MHz ■ Small signal bandwidth 2.4V to 5V ■ Supply voltage range -123dBc/Hz ■ Phase noise (VIN = 1 VPP, fC = 38.4 MHz, Δf = 1kHz) 106 V/μs ■ Slew rate 2.3 mA ■ Total su |
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National Semiconductor Corporation |
Quad Channel 26 MHz Clock Tree Driver an integrated LDO which provides an ultra low noise voltage supply with 10 mA external load current which can be used to supply the TCXO or other clock source. The I2C serial interface can be used to override the default configuration of the device t |
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National Semiconductor |
Voltage Feedback Op Amp ■ ■ ■ ■ ■ ■ ■ Wide unity gain bandwidth: 300MHz Low noise: 2nV/ Low Distortion: −65/−74dBc (10MHz) Settling time: 12ns to 0.1% Wide supply voltage range: ±2.5V to ±6V High output current: ±85mA Improved replacement for CLC428 Applications ■ ■ ■ ■ Hi |
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National Semiconductor |
Wideband Video Op Amp ■ 400MHz (AV = +2V/V, VOUT = 500mVPP) −3dB BW ■ 250MHz (AV = +2V/V, VOUT = 2VPP) -3dB BW ■ 0.1dB gain flatness to 120MHz ■ Low power: 5.6mA ■ TTL compatible shutdown pin (LMH6720) ■ Very low diff. gain, phase: 0.01%, 0.01° (LMH6714) ■ −58 HD2/ −70 HD |
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National Semiconductor |
650 MHz Progammable Gain Buffer n Wideband operation 650 MHz — AV = +1, VO = 0.5 VPP 450 MHz — AV = +2, VO = 0.5 VPP 400 MHz — AV = +2, VO = 2 VPP ± 90 mA n High output current n Very low distortion — 2nd/3rd harmonics (10 MHz, RL = 100Ω): −62/−78 — Differential gain/Differential p |
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National Semiconductor |
(LMH0xxx) DVB-ASI SDI Deserializer ■ ■ ■ ■ ■ ■ LVDS Interface Dual multiplexed inputs No external VCO or clock required Loopthrough with Cable Driver SMBus configuration interface 48 pin LLP package Applications ■ SDI interfaces for: — — — — Video Cameras DVRs Video Switchers Video E |
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National Semiconductor |
3Gbps HD/SD SDI Adaptive Cable Equalizer include separate carrier detect and output mute pins which may be tied together to mute the output when no signal is present. A programmable mute reference is provided to mute the output at a selectable level of signal degradation. Features ■ SMPTE |
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