National Semiconductor F38 fiche technique

No.	Partie #	Fabricant	Description
1	F38C70	National Semiconductor	Single-Chip Microcomputer
2	F3850	National Semiconductor	Central Processing Unit (CPU)
3	74F38	National Semiconductor	Quad Two-Input NAND Buffer ment for LCC TL F 9465 –3 TL F 9465 – 1 TL F 9465 – 2 TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 9465 RRD-B30M75 Printed in U S A Unit Loading Fan Out 54F 74F Pin Names
4	DS90CF386	National Semiconductor	+3.3V LVDS Receiver n 20 to 85 MHz shift clock support n Rx power consumption < 142 mW (typ) @85MHz Grayscale n Rx Power-down mode < 1.44 mW (max) n ESD rating > 7 kV (HBM), > 700V (EIAJ) n Supports VGA, SVGA, XGA and Single Pixel SXGA. n PLL requires no external compon
5	DS90CF388	National Semiconductor	Dual Pixel LVDS Display Interface n Complies with OpenLDI specification for digital display interfaces n 32.5 to 112/170MHz clock support n Supports SVGA through QXGA panel resolutions n Drives long, low cost cables n Up to 5.38Gbps bandwidth n Pre-emphasis reduces cable loading effe
6	54F38	National Semiconductor	Quad Two-Input NAND Buffer nd Flatpak Pin Assignment for LCC TL F 9465 –3 TL F 9465 – 1 TL F 9465 – 2 TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 9465 RRD-B30M75 Printed in U S A Unit Loading Fan
7	74F382	National Semiconductor	4-Bit Arithmetic Logic Y Y Y Y Y Performs six arithmetic and logic functions Selectable LOW (clear) and HIGH (preset) functions LOW input loading minimizes drive requirements Carry output for ripple expansion Overflow output for twos complement arithmetic Commercial 74F3
8	DS90CF384A	National Semiconductor	+3.3V LVDS Receiver n n n n n n n n n n n 20 to 65 MHz shift clock support 50% duty cycle on receiver output clock Best –in –Class Set & Hold Times on RxOUTPUTs Rx power consumption < 142 mW (typ) @65MHz Grayscale Rx Power-down mode < 200µW (max) ESD rating > 7 kV (HBM),
9	DS90CF383	National Semiconductor	+3.3V LVDS Transmitter n n n n n n n n n n n n n n n n 20 to 65 MHz shift clock support Single 3.3V supply Chipset (Tx + Rx) power consumption < 250 mW (typ) Power-down mode ( < 0.5 mW total) Single pixel per clock XGA (1024x768) ready Supports VGA, SVGA, XGA and higher ad
10	DS90CF384	National Semiconductor	+3.3V Programmable LVDS Transmitter n 20 to 65 MHz shift clock support n Programmable transmitter (DS90C383) strobe select (Rising or Falling edge strobe) n Single 3.3V supply n Chipset (Tx + Rx) power consumption < 250 mW (typ) n Power-down mode (< 0.5 mW total) n Single pixel per clo
11	LMF380	National Semiconductor	LMF380 Triple One-Third Octave Switched-Capacitor Active Filter Y Y Y Three bandpass filters with one-third octave center frequency spacing Choice of internal or external clock No external components other than clock or crystal and two capacitors Key Specifications Y Y Passband gain accuracy Better than 0 7 dB
12	DS90CF388A	National Semiconductor	Dual Pixel LVDS Display Interface/FPD-Link n Supports SVGA through QXGA panel resolutions n 32.5 to 112/170MHz clock support n Drives long, low cost cables n Up to 5.7 Gbps bandwidth n Pre-emphasis reduces cable loading effects n Dual pixel architecture supports interface to GUI and timing co