No. | Partie # | Fabricant | Description | Fiche Technique |
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National Semiconductor |
Hex Digit Driver Y Y Y Y Y Y Y 150 mA sink capability Low voltage operation Low input current for MOS compatibility Low standby power Display blanking capability Low voltage saturating outputs Hex high gain circuits Schematic and Connection Diagrams Dual-In-Line Pa |
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National Semiconductor |
MOS-to-LED Digit Driver/ Quad Segment Driver Y Y Y Y Y 50 mA source or sink capability per driver (DS75491) 250 mA sink capability per driver (DS75492) MOS compatability (low input current) Low standby power High-gain Darlington circuits Schematic and Connection Diagrams DS75491 (each driver) |
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National Semiconductor |
Multipoint RS-485/RS-422 Transceivers n Meets EIA standard RS485 for multipoint bus transmission and is compatible with RS-422. n Small Outline (SO) Package option available for minimum board space. n 22 ns driver propagation delays. n Single +5V supply. n −7V to +12V bus common mode ran |
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National Semiconductor |
Multipoint RS-485/RS-422 Transceivers n Meets EIA standard RS485 for multipoint bus transmission and is compatible with RS-422. n Small Outline (SO) Package option available for minimum board space. n 22 ns driver propagation delays. n Single +5V supply. n −7V to +12V bus common mode ran |
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National Semiconductor |
Series Dual Peripheral Drivers n n n n n n n n 300 mA output current capability High voltage outputs No output latch-up at 20V High speed switching Choice of logic function TTL compatible diode-clamped inputs Standard supply voltages Replaces TI “A” and “B” series Connection Diag |
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National Semiconductor |
MOS-to-LED Digit Driver/ Quad Segment Driver Y Y Y Y Y 50 mA source or sink capability per driver (DS75491) 250 mA sink capability per driver (DS75492) MOS compatability (low input current) Low standby power High-gain Darlington circuits Schematic and Connection Diagrams DS75491 (each driver) |
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National Semiconductor |
Quad LED Segment Driver Y Y Y Y Y Y Low voltage operation Low input current for MOS compatibility Low standby power Display blanking capability Output current regulation Quad high gain circuits Schematic and Connection Diagrams TL F 7561 – 1 Dual-In-Line Package Truth |
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National Semiconductor |
Series Dual Peripheral Drivers n n n n n n n n 300 mA output current capability High voltage outputs No output latch-up at 20V High speed switching Choice of logic function TTL compatible diode-clamped inputs Standard supply voltages Replaces TI “A” and “B” series Connection Diag |
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National Semiconductor |
Series Dual Peripheral Drivers n n n n n n n n 300 mA output current capability High voltage outputs No output latch-up at 20V High speed switching Choice of logic function TTL compatible diode-clamped inputs Standard supply voltages Replaces TI “A” and “B” series Connection Diag |
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National Semiconductor |
Series Dual Peripheral Drivers n n n n n n n n 300 mA output current capability High voltage outputs No output latch-up at 20V High speed switching Choice of logic function TTL compatible diode-clamped inputs Standard supply voltages Replaces TI “A” and “B” series Connection Diag |
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National Semiconductor |
Dual Line Receiver Diode protected input stage for power “OFF” condition 17 ns typ high speed TTL compatible ± 10 mV or ± 25 mV input sensitivity ± 3V input common-mode range High input impedance with normal VCC, or VCC = 0V Strobes for channel selection Dual circuits |
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National Semiconductor |
IEEE-488 GPIB Transceivers n 8-channel bi-directional non-inverting transceivers n Bi-directional control implemented with TRI-STATE ® output design n Meets IEEE Standard 488-1978 n High-speed Schottky design n Low power consumption n High impedance PNP inputs (drivers) n 500 |
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National Semiconductor |
Dual Peripheral Drivers Y 300 mA output current capability Y High voltage outputs Y No output latch-up at 20V Y High speed switching Y Choice of logic function Y TTL compatible diode-clamped inputs Y Standard supply voltages Y Replaces TI ‘‘A’’ and ‘‘B’’ series Connection |
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National Semiconductor |
Dual Differential Line Receiver Y Y Y Y Y Y Y Y Single 5V supply High common-mode voltage range Each channel individually strobed Independent response time control Uncommitted collector or active pull-up option TTL compatible output Optional 130X termination resistors Direct repla |
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National Semiconductor |
Dual Line Drivers n Improved stability over supply voltage and temperature ranges n Constant current, high impedance outputs n High speed: 15 ns max propagation delay n Standard supply voltages n Inhibitor available for driver selection n High common mode output volta |
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National Semiconductor |
Dual Differential Line Drivers Y Y Y Y Y Y Y Y Y Y Y Each circuit offers a choice of open-collector or active pull-up (totem-pole) outputs Single 5V supply Differential line operation Dual channels TTL LS compatibility Designed to be interchangeable with Fairchild 9614 line dri |
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National Semiconductor |
Dual Line Driver n Withstands sustained output short-circuit to any low impedance voltage between −25V and +25V n 2 µs max transition time through the −3V to +3V transition region under full 2500 pF load n Inputs compatible with most TTL and LS families n Common stro |
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National Semiconductor |
Quad Line Receiver n Input resistance, 3 kΩ to 7 kΩ over full RS-232C voltage range n Input threshold adjustable to meet “fail-safe” requirements without using external components n Inverting output compatible with TTL or LS n Built-in hysteresis for increased noise im |
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National Semiconductor |
IEEE-488 GPIB Transceivers n 8-channel bi-directional non-inverting transceivers n Bi-directional control implemented with TRI-STATE ® output design n Meets IEEE Standard 488-1978 n High-speed Schottky design n Low power consumption n High impedance PNP inputs (drivers) n 500 |
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National Semiconductor |
Memory Drivers high current outputs as well as internal decoding of logic inputs This circuit is designed for use with magnetic memories The circuit contains two 600 mA sink-switch pairs and two 600 mA source-switch pairs Inputs A and B determine source selection w |
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