No. | Partie # | Fabricant | Description | Fiche Technique |
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National Semiconductor |
Quad 2-Input AND Gates |
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National Semiconductor |
Quad 2-Input Schmitt Trigger NAND Gate |
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National Semiconductor |
1024-Bit TTL PROM |
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National Semiconductor |
4096-Bit TTL PROM |
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National Semiconductor |
256-BIT TTL PROM |
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National Semiconductor |
Buffers / Lind Drivers / Line Receivers |
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National Semiconductor |
Dual 4-Input NSND Line Driver |
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National Semiconductor |
4096-Bit TTL PROM |
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National Semiconductor |
Synchronous 4-Bit Binary Counters Y Synchronously programmable Y Internal look-ahead for fast counting Y Carry output for n-bit cascading Y Synchronous counting Y Load control line Y Diode-clamped inputs Connection Diagram Dual-In-Line Package Order Number DM74S161N or DM74S163N S |
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National Semiconductor |
4-Bit Parallel Access Shift Registers Y Synchronous parallel load Y Positive-edge-triggered clocking Y Parallel inputs and outputs from each flip-flop Y Direct overriding clear Y J and K inputs to first stage Y Complementary outputs from last stage Y For use in high-performance accumulat |
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National Semiconductor |
Quad 2-Input AND Gates |
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National Semiconductor |
HEX INVERTING GATES |
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National Semiconductor |
Buffers / Lind Drivers / Line Receivers |
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National Semiconductor |
256 - BIT TTL PROM |
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National Semiconductor |
QUAD 1 OF 2 LINE DATA SELECTORS/MULTIPLEXERS |
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National Semiconductor |
Buffers / Lind Drivers / Line Receivers |
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National Semiconductor |
Buffers / Lind Drivers / Line Receivers |
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National Semiconductor |
Buffers / Lind Drivers / Line Receivers |
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National Semiconductor |
(512 x 4) 2048 Bit TTL PROM |
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National Semiconductor |
4K-Bit TTL PROM Y Y Y Y Y Y Advanced titanium-tungsten (Ti-W) fuses Schottky-clamped for high speed Address access 45 ns max Enable access 30 ns max Enable recovery 30 ns max PNP inputs for reduced input loading All DC and AC parameters guaranteed over temperatur |
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