No. | Partie # | Fabricant | Description | Fiche Technique |
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NXP Semiconductors |
Dual inverting buffer/line driver I I I I Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/output for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: N JESD8-7 (1.65 V to 1.95 V) N JESD8-5 (2.3 V to 2.7 V) N JESD8-B/JESD36 (2.7 V to 3.6 V |
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NXP Semiconductors |
2-input EXCLUSIVE-OR gate allow the use of these devices in a mixed 3.3 V and 5 V environment. This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when |
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NXP Semiconductors |
3.3 V 16-bit buffer/driver I I I I I I I I I 16-bit bus interface 3-state buffers Output capability: +64 mA and −32 mA TTL input and output switching levels Input and output interface capability to systems at 5 V supply Power-up 3-state Live insertion and extraction permitted |
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NXP Semiconductors |
2-channel analog multiplexer/demultiplexer and benefits • Wide supply voltage range from 1.65 V to 5.5 V • Very low ON resistance: – 7.5 Ω (typical) at VCC = 2.7 V – 6.5 Ω (typical) at VCC = 3.3 V – 6 Ω (typical) at VCC = 5 V • Switch current capability of 32 mA • Break-before-make switching |
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NXP Semiconductors |
Triple buffer s s s s Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/output for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: x JESD8-7 (1.65 V to 1.95 V) x JESD8-5 (2.3 V to 2.7 V) x JESD8-B/JESD36 (2.7 V to 3.6 V |
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NXP Semiconductors |
Single D-type flip-flop I I I I Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant inputs for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: N JESD8-7 (1.65 V to 1.95 V) N JESD8-5 (2.3 V to 2.7 V) N JESD8-B/JESD36 (2.7 V to 3.6 V) ±24 |
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NXP Semiconductors |
Single D-type flip-flop s s s s Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant inputs for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: x JESD8-7 (1.65 V to 1.95 V) x JESD8-5 (2.3 V to 2.7 V) x JESD8-B/JESD36 (2.7 V to 3.6 V) ±24 |
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NXP Semiconductors |
Single 2-input multiplexer s Wide supply voltage range from 1.65 V to 5.5 V s High noise immunity s Complies with JEDEC standard: x JESD8-7 (1.65 V to 1.95 V) x JESD8-5 (2.3 V to 2.7 V) x JESD8B/JESD36 (2.7 V to 3.6 V) s ±24 mA output drive (VCC = 3.0 V) s CMOS low power consu |
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NXP Semiconductors |
8-bit serial-in/serial-out or parallel-out shift register s s s s s s s s 5 V tolerant inputs/outputs for interfacing with 5 V logic Wide supply voltage range from 1.2 V to 3.6 V CMOS low-power consumption Direct interface with TTL levels Balanced propagation delays All inputs have Schmitt-trigger action Co |
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NXP Semiconductors |
16-bit buffer/line driver • 5 V tolerant inputs/outputs for interfacing with 5 V logic • Wide supply voltage range from 1.2 to 3.6 V • CMOS low power consumption • MULTIBYTETM flow-through standard pin-out architecture • Low inductance multiple power and ground pins for minim |
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NXP Semiconductors |
Overvoltage tolerant bilateral switch s Wide supply voltage range from 2.3 V to 5.5 V s Ultra low-power operation s Very low ON-resistance: x 8.0 Ω (typ) at VCC = 2.7 V x 7.5 Ω (typ) at VCC = 3.3 V x 7.3 Ω (typ) at VCC = 5.0 V. s 5 V tolerant input for interfacing with 5 V logic s High n |
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NXP Semiconductors |
3.3V 16-bit transceiver an output enable input (nOE) for easy cascading and a direction input (nDIR) for direction control. 2. Features and benefits 16-bit bidirectional bus interface 3-state buffers Output capability: +64 mA and 32 mA TTL input and output switchin |
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NXP Semiconductors |
3.3 V 16-bit transceiver an output enable input (nOE) for easy cascading and a direction input (nDIR) for direction control. 2. Features I I I I I I I I I 16-bit bus interface 3-state buffers Output capability: +64 mA and −32 mA TTL input and output switching levels Input a |
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NXP Semiconductors |
Triple inverter allow the use of these devices in a mixed 3.3 V and 5 V environment. 2. Features I I I I Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/output for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: N JESD |
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NXP Semiconductors |
Single D-type flip-flop positive-edge trigger s Wide supply voltage range from 1.65 V to 5.5 V s High noise immunity s Complies with JEDEC standard: x JESD8-7 (1.65 V to 1.95 V) x JESD8-5 (2.3 V to 2.7 V) x JESD8B/JESD36 (2.7 V to 3.6 V) s ±24 mA output drive (VCC = 3.0 V) s CMOS low power consu |
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NXP Semiconductors |
Single D-type flip-flop and benefits Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant inputs for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8B/JESD36 (2.7 V to |
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NXP Semiconductors |
Triple buffer I I I I Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/output for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: N JESD8-7 (1.65 V to 1.95 V) N JESD8-5 (2.3 V to 2.7 V) N JESD8B/JESD36 (2.7 V to 3.6 V) |
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NXP Semiconductors |
Triple inverter s s s s Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/output for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: x JESD8-7 (1.65 V to 1.95 V) x JESD8-5 (2.3 V to 2.7 V) x JESD8-B/JESD36 (2.7 V to 3.6 V |
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NXP Semiconductors |
3-input EXCLUSIVE-OR gate s Wide supply voltage range from 1.65 to 5.5 V s High noise immunity s Complies with JEDEC standard: x JESD8-7 (1.65 V to 1.95 V) x JESD8-5 (2.3 V to 2.7 V) x JESD8B/JESD36 (2.7 V to 3.6 V) s ±24 mA output drive (VCC = 3.0 V) s Latch-up performance e |
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NXP Semiconductors |
2-input NAND gate I I I I Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant outputs for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: N JESD8-7 (1.65 V to 1.95 V) N JESD8-5 (2.3 V to 2.7 V) N JESD8-B/JESD36 (2.7 V to 3.6 V). ES |
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