No. | Partie # | Fabricant | Description | Fiche Technique |
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NXP |
I2C bus extender of the I2C-bus it permits extension of the practical separation distance between components on the I2C-bus by buffering both the data (SDA) and the clock (SCL) lines. The I2C-bus capacitance limit of 400 pF restricts practical communication distances |
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NXP |
Using the P82B96 for bus interface of being able to operate inputs and outputs above the VCC rail, up to 15 volts. There is an internal diode from each pin to VEE. This diode will conduct if negative voltages are applied to any pin. The -0.3 V rating is applied to ensure these diodes |
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NXP |
Low power / low price dual fan manager a Turn-on Delay for a second fan when both fans have to turn-on. This reduces the in-rush current and suppresses acoustic noise. The P82CF201 also features fan fault sensing for enhancing system protection and reliability. It detects the presence of |
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NXP |
Dual bidirectional bus buffer • Bidirectional data transfer of I2C-bus signals • Isolates capacitance allowing 400 pF on Sx/Sy side and 4000 pF on Tx/Ty side • Tx/Ty outputs have 60 mA sink capability for driving low-impedance or high capacitive buses • 400 kHz operation over at |
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NXP |
CAN Serial Linked I/O device SLIO with digital and analog port functions GENERAL DESCRIPTION ORDERING INFORMATION BLOCK DIAGRAM FUNCTIONAL DIAGRAM PINNING INFORMATION Pinning Pin description FUNCTIONAL DESCRIPTION I/O functions I/O registers CAN functions Initialization P82C150 operation after RESET or change of bus mode |
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NXP |
CAN Serial Linked I/O device SLIO with digital and analog port functions GENERAL DESCRIPTION ORDERING INFORMATION BLOCK DIAGRAM FUNCTIONAL DIAGRAM PINNING INFORMATION Pinning Pin description FUNCTIONAL DESCRIPTION I/O functions I/O registers CAN functions Initialization P82C150 operation after RESET or change of bus mode |
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NXP |
CAN Serial Linked I/O device SLIO with digital and analog port functions GENERAL DESCRIPTION ORDERING INFORMATION BLOCK DIAGRAM FUNCTIONAL DIAGRAM PINNING INFORMATION Pinning Pin description FUNCTIONAL DESCRIPTION I/O functions I/O registers CAN functions Initialization P82C150 operation after RESET or change of bus mode |
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NXP |
TrenchMOS logic level FET s Logic level compatible s Low gate charge 1.3 Applications s DC to DC converters s Switched mode power supplies 1.4 Quick reference data s VDS = 30 V s Ptot = 136 W s ID = 75 A s RDSon ≤ 8 mΩ 2. Pinning information Table 1: 1 2 3 mb Pinning - SOT |
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