No. | Partie # | Fabricant | Description | Fiche Technique |
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NXP Semiconductors |
32-bit ARM Cortex-M3 microcontroller |
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NXP |
32-bit ARM Cortex-M0 microcontroller and benefits System: ARM Cortex-M0 processor, running at frequencies of up to 50 MHz. ARM Cortex-M0 built-in Nested Vectored Interrupt Controller (NVIC). Non-Maskable Interrupt (NMI) input selectable from several input sources. System tick |
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NXP |
(LPC177x / LPC178x) 32-bit ARM Cortex-M3 microcontroller and a higher level of support block integration. The Cortex-M3 CPU incorporates a 3-stage pipeline and has a Harvard architecture with separate local instruction and data buses, as well as a third bus with slightly lower performance for peripherals. |
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NXP |
Single-chip 16-bit/32-bit microcontrollers through output match on all timers, and 32 fast GPIO lines with up to nine edge or level sensitive external interrupt pins make these microcontrollers particularly suitable for industrial control and medical systems. 2. Features 2.1 Enhanced features |
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NXP |
32-bit ARM Cortex-M33 microcontroller and benefits ARM Cortex-M33 core (r0p3): Running at a CPU frequency of up to 150 MHz Memory Protection Unit (MPU). ARM Cortex M33 built-in Nested Vectored Interrupt Controller (NVIC). Non-maskable Interrupt (NMI) input with a selection of s |
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NXP |
microcontroller and benefits ARM Cortex-M33 core (r0p4): Running at a frequency of up to 96 MHz. Integrated digital signal processing (DSP) instructions. TrustZone®, Floating Point Unit (FPU) and Memory Protection Unit (MPU). ARM Cortex M33 built-in Nested |
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NXP Semiconductors |
P89LPC901FN 2.1 Principal features s 1 kB byte-erasable Flash code memory organized into 256-byte sectors and 16-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage. s 128-byte RAM data memory. s Two 16-bit counter/timers. |
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NXP Semiconductors |
32-bit ARM Cortex-M0 microcontroller a Windowed Watchdog Timer, a DMA controller, a CRC engine, four general purpose timers, a 32-bit RTC, a 1 % internal oscillator for baud rate generation, and up to 55 General Purpose I/O (GPIO) pins. 2. Features and benefits Processor core ARM C |
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NXP |
32-bit coprocessor and benefits Arm Cortex-M33 core (r0p4): Running at a frequency of up to 150 MHz. Integrated digital signal processing (DSP) instructions. TrustZone®, Floating Point Unit (FPU) and Memory Protection Unit (MPU). Arm Cortex M33 built-in Neste |
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NXP Semiconductors |
(P89LPC912 - P89LPC914) 8-bit microcontrollers s 1 kB byte-erasable Flash code memory organized into 256-byte sectors and 16-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage. s 128-byte RAM data memory. s Two 16-bit counter/timers. Each timer may be config |
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NXP Semiconductors |
Flashless microcontroller make this device optimally suited for communication gateways and protocol converters. Complementing the many serial communication controllers, versatile clocking capabilities, and memory features are various 32-bit timers, an improved 10-bit ADC, 10- |
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NXP |
(LPC2926 - LPC2929) ARM9 microcontroller and benefits ARM968E-S processor running at frequencies of up to 125 MHz maximum. Multi-layer AHB system bus at 125 MHz with four separate layers. On-chip memory: Two Tightly Coupled Memories (TCM), 32 kB Instruction TCM (ITCM), 32 kB Data TC |
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NXP |
32-bit ARM Cortex-M0+ microcontroller and benefits System: ARM Cortex-M0+ processor, running at frequencies of up to 30 MHz with single-cycle multiplier and fast single-cycle I/O port. ARM Cortex-M0+ built-in Nested Vectored Interrupt Controller (NVIC). System tick timer. Seria |
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NXP |
32-bit ARM Cortex-M0+ microcontroller and benefits System: ARM Cortex-M0+ processor (version r0p1), running at frequencies of up to 50 MHz with single-cycle multiplier and fast single-cycle I/O port. ARM Cortex-M0+ built-in Nested Vectored Interrupt Controller (NVIC). AHB Multila |
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NXP |
ARM Cortex-M33 microcontroller and benefits ARM® Cortex-M33 core (r0p4): Running at a frequency of up to 150 MHz. Integrated digital signal processing (DSP) instructions. Floating Point Unit (FPU) and Memory Protection Unit (MPU). ARM Cortex M33 built-in Nested Vectored |
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NXP |
microcontroller and benefits System: Arm Cortex-M0+ processor (revision r0p1), running at frequencies of up to 60 MHz with single-cycle multiplier and fast single-cycle I/O port. Arm Cortex-M0+ built-in Nested Vectored Interrupt Controller (NVIC). System tic |
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NXP |
8-bit microcontrollers with two-clock 80C51 core 2 kB/4 kB/8 kB 3 V low-power Flash with 256-byte data RAM 2.1 Principal features s 2 kB/4 kB/8 kB Flash code memory with 1 kB erasable sectors, 64-byte erasable page size, and single byte erase. s 256-byte RAM data memory. s Two 16-bit counter/timers. Each timer may be configured to toggle a port output upon |
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NXP |
32-bit ARM Cortex-M4 microcontroller The ARM Cortex-M4 is a 32-bit core that offers system enhancements such as low power consumption, enhanced debug features, and a high level of support block integration. The ARM Cortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architect |
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NXP Semiconductors |
(P89LPC9102 - P89LPC9107) 8-bit microcontrollers 2.1 Principal features s 1 kB byte-erasable Flash code memory organized into 256-byte sectors and 16-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage. s 128-byte RAM data memory. s Two 16-bit timer/counters ( |
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NXP Semiconductors |
8-bit microcontrollers 2.1 Principal features s 1 kB byte-erasable Flash code memory organized into 256-byte sectors and 16-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage. s 128-byte RAM data memory. s Two 16-bit counter/timers. |
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