No. | Partie # | Fabricant | Description | Fiche Technique |
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RCA |
CMOS LSI 4-Bit Arithmetic Logic Unit |
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Toshiba |
Logic Controller LSI |
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LSI Logic |
(L64733) Tuner and Satellite Receiver Chipset and Benefits System Features • • • • • • Direct down-conversion Integrated programmable cut-off low-pass filters for variable-rate operation Dual AGC for optimizing performance with respect to intermodulation and noise Integrated synthesizer Integrated |
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LSI Logic |
PCI to Ultra SCSI Controller in the LSI53C875A 1.2 Benefits of Ultra SCSI 1.3 TolerANT® Technology 1.4 LSI53C875A Benefits Summary 1.4.1 SCSI Performance 1.4.2 PCI Performance 1.4.3 Integration 1.4.4 Ease of Use 1.4.5 Flexibility 1.4.6 Reliability 1.4.7 Testability Functional De |
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LSI Logic Corporation |
Microprocessor Core All rights reserved. TRADEMARK ACKNOWLEDGMENT The LSI Logic logo design, CoreWare, and Right-First-Time are registered trademarks or trademarks of LSI Logic Corporation. ARM is a registered trademark of ARM Limited, used under license. All other bra |
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LSI Logic Corporation |
Transport With Embedded Cpu And Control a very extensive hardware-assisted PSI section filtering scheme. This functionality is not only a superset of the standard MPEG-2 section filtering scheme but also covers worldwide service providers' specific filtering requirements. The integration o |
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LSI Logic Corporation |
LSI53C810A tice. LSI Logic does not assume any responsibility or liability arising out of the application or use of any product described herein, except as expressly agreed to in writing by LSI Logic; nor does the purchase or use of a product from LSI Logic con |
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LSI Logic Corporation |
Pci to Ultra Scsi I/o Processor Technical Manual Options 1.2.1 PCI Pad Power-up Sequence ® 1.3 TolerANT Technology 1.4 LSI53C825A Benefits Summary 1.4.1 SCSI Performance 1.4.2 PCI Performance 1.4.3 Integration 1.4.4 Ease of Use 1.4.5 Flexibility 1.4.6 Reliability 1.4.7 Testability Functional Descrip |
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LSI Logic |
MPEG Audio Decoder Technical Manual |
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LSI Logic Corporation |
Single-Chip Source Decoder an IDE/ATA interface allowing settop box manufacturers to seamlessly design-in hard disk storage media for support of digital recording applications. The SC2005 chip incorporates a high performance 108-MHz, 32-bit, TinyRISC® MIPS microprocessor, maki |
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LSI Logic |
2-Error Correcting BCH Encoder-Decoder |
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LSI Logic |
Single chip 100BaseTX/10BaseT PHY Chapter 2, Functional Description, describes each of the internal blocks in the device in some detail. Chapter 3, Signal Descriptions, lists and describes the device input and output signals. Chapter 4, Registers, gives a register summary and descri |
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LSI Logic Corporation |
Satellite Receiver Summary L64724 Signal Definitions 2.1 Channel Interface 2.2 Channel Clock Interface 2.3 Phase-Locked Loop (PLL) Interface 2.4 Control Signals Interface 2.5 AGC/Clock Control Interface 2.6 Channel Data Output Interface 2.7 Analog-to-Digital Converter ( |
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LSI Logic |
Fast Scsi Controller Technical Manual V2.1 4/02 Functional Description 2.1 Typical SCSI Operation 2.2 Bus-Initiated Sequences 2.2.1 Bus-Initiated Selection 2.2.2 Bus-Initiated Reselection 2.2.3 Bus-Initiated Reset 2.2.4 Stacked Commands 2.3 Parity Checking and Generation 2.4 Host Bus Configuration |
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LSI Logic Corporation |
LSI53C825A Options 1.2.1 PCI Pad Power-up Sequence ® 1.3 TolerANT Technology 1.4 LSI53C825A Benefits Summary 1.4.1 SCSI Performance 1.4.2 PCI Performance 1.4.3 Integration 1.4.4 Ease of Use 1.4.5 Flexibility 1.4.6 Reliability 1.4.7 Testability Functional Descrip |
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LSI Logic Corporation |
4-port SAS/SATA controller a performance-based message passing protocol that offloads the host CPU by completely managing all I/Os and minimizes system bus overhead by coalescing interrupts. The Fusion-MPT architecture requires only a thin, easy to develop device driver that is |
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MCS Logic |
VOICE SYNTHESIS LSI VOICE SYNTHESIS LSI with External ROM (1) Built-in Current mode 12bit DAC (2) Built-in digitally adjusted low pass filter & Interpolator (3) Variable Sampling Frequency(Fs) 4KHz, 6.4KHz, 8KHz, 16KHz (4) Master Clock Frequency : 640KHz (5) Number of |
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LSI Logic |
SCSI I/O Processor ic does not assume any responsibility or liability arising out of the application or use of any product described herein, except as expressly agreed to in writing by LSI Logic; nor does the purchase or use of a product from LSI Logic convey a license |
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LSI Logic |
(L64734) Tuner and Satellite Receiver Chipset and Benefits The following subsections provide a list of system and chipset features. System Features • • • • • • Direct down-conversion Integrated programmable cut-off low-pass filters for variable-rate operation Dual AGC for optimizing performance w |
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Lattice Semiconductor |
3.3V High Density Programmable Logic • HIGH DENSITY PROGRAMMABLE LOGIC — — — — — 6000 PLD Gates 128 and 64 I/O Pin Versions, Eight Dedicated Inputs 128 Registers High Speed Global Interconnect Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc. — Small Logic Bloc |
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