| No. | Partie # | Fabricant | Description | Fiche Technique |
|---|---|---|---|---|
|
|
|
LSI Logic |
(L64733) Tuner and Satellite Receiver Chipset and Benefits System Features • • • • • • Direct down-conversion Integrated programmable cut-off low-pass filters for variable-rate operation Dual AGC for optimizing performance with respect to intermodulation and noise Integrated synthesizer Integrated |
|
|
|
|
LSI Logic Corporation |
Transport With Embedded Cpu And Control a very extensive hardware-assisted PSI section filtering scheme. This functionality is not only a superset of the standard MPEG-2 section filtering scheme but also covers worldwide service providers' specific filtering requirements. The integration o |
|
|
|
|
LSI Logic |
MPEG Audio Decoder Technical Manual |
|
|
|
|
LSI Logic |
2-Error Correcting BCH Encoder-Decoder |
|
|
|
|
LSI Logic Corporation |
Satellite Receiver Summary L64724 Signal Definitions 2.1 Channel Interface 2.2 Channel Clock Interface 2.3 Phase-Locked Loop (PLL) Interface 2.4 Control Signals Interface 2.5 AGC/Clock Control Interface 2.6 Channel Data Output Interface 2.7 Analog-to-Digital Converter ( |
|
|
|
|
LSI Logic |
(L64734) Tuner and Satellite Receiver Chipset and Benefits The following subsections provide a list of system and chipset features. System Features • • • • • • Direct down-conversion Integrated programmable cut-off low-pass filters for variable-rate operation Dual AGC for optimizing performance w |
|
|
|
|
LSI Logic |
MPEG-2 Transport Controller The L64118 provides additional system features for a set-top box application, including: Channel • • • Compliance with ISO/IEC 13818-1 (MPEG-2) Transport specifications Sustained rates up to 90 Mbits/s serial and up to 13.0 Mbytes/s parallel transpor |
|
|
|
|
LSI Logic |
MPEG-2 Audio / Video Decoder I/O Signal Descriptions 2.1 Signals Organization 2.2 Host Interface 2.3 Channel Interface 2.4 Memory Interface 2.5 Video Interface 2.6 Audio Interface 2.7 Miscellaneous and Test Interfaces Register Summary 3.1 Summary by Register 3.2 Alphabetical Lis |
|
|
|
|
LSI Logic |
8-Error Correcting Reed Solomon Codec |
|