| No. | Partie # | Fabricant | Description | Fiche Technique |
|---|---|---|---|---|
|
|
|
LAPIS |
400MHz Transceiver IC • Complies with RCR STD-30 (low-power radio security system) and ATIB STD-T67 (specified low-power radio statiion) • Operating Frequency 426.0250 MHz to 426.8375 MHz 429.1750 MHz to 429.9250 MHz Note: Including the frequency range that are not define |
|
|
|
|
LAPIS |
Audio CODEC Single 3 V power supply VDD: 2.4 to 3.3 V Coding format: PCM -law/PCM A-law/14-bit linear mode selectable PCM interface timing: Long frame synchronous timing/short frame synchronous timing selectable Transmit/receive full-duplex operation |
|
|
|
|
LAPIS |
Multifunction ADPCM CODEC Single 3 V Power Supply Operation (VDD: 2.7 to 3.6 V) ADPCM Algorithm: ITU-T G.726 (32 kbps, 24 kbps, 16 kbps) Full-Duplex Transmit/Receive Operation Transmit/Receive Synchronous Mode Only PCM Data Format: -law Serial PCM/ADPCM Transmiss |
|
|
|
|
LAPIS |
DTMF Transceiver • Wide range of power supply voltage : +2.7 V to +5.5 V • Low power consumption Operating mode : 4.0 mA (VDD = 3 V) Typ. Operating mode : 5.0 mA (VDD = 5 V) Typ. Power down mode : 1 mA Typ. • The 4-bit processor interface supports both the Intel proc |
|
|
|
|
LAPIS |
Sub GHz band wireless transmitter IC • Support 200 MHz to 972 MHz operation. (*1) • Support narrow band systems with channel spacing of 12.5 or 25 kHz • High accurate modulation implemented by direct modulation scheme using fractional-N PLL • Multiple modulation scheme : 2-FSK/MSK |
|
|
|
|
LAPIS |
Sub GHz band wireless transmitter IC • Support 200 MHz to 972 MHz operation. (*1) • Support narrow band systems with channel spacing of 12.5 or 25 kHz • High accurate modulation implemented by direct modulation scheme using fractional-N PLL • Multiple modulation scheme : 2-FSK/MSK |
|
|
|
|
LAPIS |
Sub GHz band short range wireless transceiver IC • Compliant to ARIB STD T-108 (ML7396B) • Compliant to FCC Part15 (ML7396A) • Compliant to ETSI EN 300-220 (ML7396E) • High resolution modulation by using fractional-N PLL direct modulation. • Modulation: GFSK / GMSK, FSK / MSK (MSK is FSK transmissi |
|
|
|
|
LAPIS |
2-Channel Echo Canceler Single 3.3 V power supply (DVDD1, 2, AVDD: 3.0 to 3.6 V) ADPCM: ITU-T Recommendation G.726 (32 kbps) PCM interface code format: ITU-T Recommendation G.711 (64 kbps), -law or A-law selectable Built-in echo canceler Echo attenuation: 30 dB （ty |
|
|
|
|
LAPIS |
Bluetooth Low Energy • Bluetooth® SIG Core Spec v4.0 compliant • Ultra Low Power RF block • Cortex-M0 Micro processor, it has interrupt controller and Sys-Tick Timer • 64KB ROM (CODE_ROM) for Program, 16KB RAM (DATA_RAM) for Data • 12KB RAM (CODE_RAM) for user Progr |
|
|
|
|
LAPIS |
Bluetooth Smart LSI supporting Core Bluetooth® SIG Core Spec v4.1 compliant, supporting master and slave role function Ultra Low Power RF block Cortex-M0+ microprocessor core integrated 96KB ROM (CODE_ROM) for Program code. 28KB RAM (CODE/DATA_RAM) for user program and data |
|
|
|
|
LAPIS |
868MHz SRD RF transceiver IC |
|
|
|
|
LAPIS |
Sub GHz band short range wireless transceiver IC • Compliant to ARIB STD T-108 (ML7396B) • Compliant to FCC Part15 (ML7396A) • Compliant to ETSI EN 300-220 (ML7396E) • High resolution modulation by using fractional-N PLL direct modulation. • Modulation: GFSK / GMSK, FSK / MSK (MSK is FSK transmissi |
|
|
|
|
LAPIS |
Sub GHz band short range wireless transceiver IC • Compliant to ARIB STD T-108 (ML7396B) • Compliant to FCC Part15 (ML7396A) • Compliant to ETSI EN 300-220 (ML7396E) • High resolution modulation by using fractional-N PLL direct modulation. • Modulation: GFSK / GMSK, FSK / MSK (MSK is FSK transmissi |
|
|
|
|
LAPIS |
Sub-GHz(160MHz to 510MHz) band short range wireless transceiver IC |
|
|
|
|
LAPIS |
Sub-GHz(160MHz to 510MHz) band short range wireless transceiver IC |
|
|
|
|
LAPIS |
Sub-GHz(160MHz to 510MHz) band short range wireless transceiver IC |
|
|
|
|
LAPIS |
Bluetooth Smart LSI supporting Core Bluetooth® SIG Core Spec v4.1 compliant, supporting master and slave role function Ultra Low Power RF block Cortex-M0+ microprocessor core integrated 96KB ROM (CODE_ROM) for Program code. 28KB RAM (CODE/DATA_RAM) for user program and data |
|
|
|
|
LAPIS |
Sub-GHz (900 MHz Band) Broadband RF Transceiver IC are shown below. * For details of the RF block, refer to ML7396B Data Sheet (FJDL7396A_B_E). • Industry-standard ARM Cortex-M0+ CPU core * Maximum operating frequency: 40 MHz • 512 KB flash memory (for program [256 KB x 2 bank configuration is possib |
|
|
|
|
LAPIS |
Dual-Channel Line Card CODEC Seamlessly interfaces with Intersil RSLICTM series devices Single 5 volt power supply (4.75 V to 5.25 V) - ADC and DAC PCM format: µ-law/A-law (ITU-T G.711 compliant), 14-bit linear (2’s complement) Optional wideband filter for V.90 |
|
|
|
|
LAPIS |
Dual Echo Canceler & Noise Canceler • Single 3.3 V Power Supply Operation (3.0 to 3.6 V) [with built-in regulator to generate internal pow |
|