No. | Partie # | Fabricant | Description | Fiche Technique |
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Intersil Corporation |
CMOS 16-Bit Microprocessor • Compatible with NMOS 8086 • Completely Static CMOS Design - DC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5MHz (80C86) - DC . . . . . . . . . . . . . . . . . . . . . . . . . . . .8MHz (80C86-2) • Low Power Operation - lCCSB . . . . . |
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Intersil Corporation |
CMOS 8/16-Bit Microprocessor • Compatible with NMOS 8088 • Direct Software Compatibility with 80C86, 8086, 8088 • 8-Bit Data Bus Interface; 16-Bit Internal Architecture • Completely Static CMOS Design - DC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5MHz (80C88) - |
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Intersil Corporation |
CMOS 16-Bit Microprocessor • Compatible with NMOS 8086 • Completely Static CMOS Design - DC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5MHz (80C86) - DC . . . . . . . . . . . . . . . . . . . . . . . . . . . .8MHz (80C86-2) • Low Power Operation - lCCSB . . . . . |
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Intersil Corporation |
Clock Generator and Ready Interface for 80C286 Processors • Generates System Clock for 80C286 Processors • Generates System Reset Output from Schmitt Trigger Input - Improved Hysteresis • Uses Crystal or External Signal for Frequency Source • Dynamically Switchable between Two Input Frequencies • Provides L |
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Intersil Corporation |
High Performance Microprocessor with Memory Management and Protection • This Circuit is Processed in Accordance to MIL-STD883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1. • Compatible with NMOS 80286/883 • Static CMOS Design for Low Power Operation - ICCSB = 5mA Maximum - ICCOP = 185mA Maximum (80C2 |
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Intersil Corporation |
High Performance Microprocessor • Compatible with NMOS 80286 • Wide Range of Clock Rates - DC to 25MHz (80C286-25) - DC to 20MHz (80C286-20) - DC to 16MHz (80C286-16) - DC to 12.5MHz (80C286-12) - DC to 10MHz (80C286-10) • Static CMOS Design for Low Power Operation - ICCSB = 5mA Ma |
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Intersil Corporation |
Clock Generator and Ready Interface for 80C286 Processors • Generates System Clock for 80C286 Processors • Generates System Reset Output from Schmitt Trigger Input - Improved Hysteresis • Uses Crystal or External Signal for Frequency Source • Dynamically Switchable between Two Input Frequencies • Provides L |
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Intersil Corporation |
CMOS 16-Bit Microprocessor • Compatible with NMOS 8086 • Completely Static CMOS Design - DC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5MHz (80C86) - DC . . . . . . . . . . . . . . . . . . . . . . . . . . . .8MHz (80C86-2) • Low Power Operation - lCCSB . . . . . |
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Intersil Corporation |
30A/ 700V - 1000V Ultrafast Dual Diodes • Ultrafast with Soft Recovery . . . . . . . . . . . . . . . . <110ns • Operating Temperature . . . . . . . . . . . . . . . . . . . . +175 C • Reverse Voltage Up to . . . . . . . . . . . . . . . . . . . . . . 1000V • Avalanche Energy Rated • Planar C |
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Intersil Corporation |
High Performance Microprocessor with Memory Management and Protection • This Circuit is Processed in Accordance to MIL-STD883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1. • Compatible with NMOS 80286/883 • Static CMOS Design for Low Power Operation - ICCSB = 5mA Maximum - ICCOP = 185mA Maximum (80C2 |
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Intersil Corporation |
CMOS 8/16-Bit Microprocessor • Compatible with NMOS 8088 • Direct Software Compatibility with 80C86, 8086, 8088 • 8-Bit Data Bus Interface; 16-Bit Internal Architecture • Completely Static CMOS Design - DC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5MHz (80C88) - |
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Intersil Corporation |
CMOS 16-Bit Microprocessor • Compatible with NMOS 8086 • Completely Static CMOS Design - DC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5MHz (80C86) - DC . . . . . . . . . . . . . . . . . . . . . . . . . . . .8MHz (80C86-2) • Low Power Operation - lCCSB . . . . . |
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Intersil Corporation |
CMOS 8/16-Bit Microprocessor • Compatible with NMOS 8088 • Direct Software Compatibility with 80C86, 8086, 8088 • 8-Bit Data Bus Interface; 16-Bit Internal Architecture • Completely Static CMOS Design - DC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5MHz (80C88) - |
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Intersil Corporation |
CMOS 8/16-Bit Microprocessor • Compatible with NMOS 8088 • Direct Software Compatibility with 80C86, 8086, 8088 • 8-Bit Data Bus Interface; 16-Bit Internal Architecture • Completely Static CMOS Design - DC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5MHz (80C88) - |
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Intersil Corporation |
CMOS 8/16-Bit Microprocessor • Compatible with NMOS 8088 • Direct Software Compatibility with 80C86, 8086, 8088 • 8-Bit Data Bus Interface; 16-Bit Internal Architecture • Completely Static CMOS Design - DC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5MHz (80C88) - |
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Intersil Corporation |
Radiation Hardened 8-Bit CMOS Microprocessor • Devices QML Qualified in Accordance With MIL-PRF-38535 • Detailed Electrical and Screening Requirements are Contained in SMD# 5962-95824 and Intersil’ QM Plan • Radiation Hardened EPI-CMOS - Parametrics Guaranteed 1 x 105 RAD(Si) - Transient Upset > |
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Intersil Corporation |
Radiation Hardened 16-Bit CMOS Microprocessor • Radiation Hardened - Latch Up Free EPl-CMOS - Total Dose >100K RAD (Si) - Transient Upset >108 RAD (Si)/s • Low Power Operation - ICCSB = 500µA (Max) - ICCOP = 12mA/MHz (Max) • Pin Compatible with NMOS 8086 and Intersil 80C86 • Completely Static De |
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Intersil Corporation |
Radiation Hardened 16-Bit CMOS Microprocessor • Radiation Hardened - Latch Up Free EPl-CMOS - Total Dose >100K RAD (Si) - Transient Upset >108 RAD (Si)/s • Low Power Operation - ICCSB = 500µA (Max) - ICCOP = 12mA/MHz (Max) • Pin Compatible with NMOS 8086 and Intersil 80C86 • Completely Static De |
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Intersil Corporation |
Radiation Hardened 16-Bit CMOS Microprocessor • Radiation Hardened - Latch Up Free EPl-CMOS - Total Dose >100K RAD (Si) - Transient Upset >108 RAD (Si)/s • Low Power Operation - ICCSB = 500µA (Max) - ICCOP = 12mA/MHz (Max) • Pin Compatible with NMOS 8086 and Intersil 80C86 • Completely Static De |
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Intersil Corporation |
Radiation Hardened 16-Bit CMOS Microprocessor • Radiation Hardened - Latch Up Free EPl-CMOS - Total Dose >100K RAD (Si) - Transient Upset >108 RAD (Si)/s • Low Power Operation - ICCSB = 500µA (Max) - ICCOP = 12mA/MHz (Max) • Pin Compatible with NMOS 8086 and Intersil 80C86 • Completely Static De |
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